Re: [PATCH] PCI: Always set prefetchable base/limit upper32 registers

[Grant Grundler <grundler@parisc-linux.org>]

On Mon, Nov 30, 2009 at 04:09:19PM -0800, Yinghai Lu wrote:
> Grant Grundler wrote:
> > On Mon, Nov 30, 2009 at 03:32:13PM -0800, Yinghai Lu wrote:
> >> IORESOURCE_MEM_64 get set when PCI_PREF_RANGE_TYPE_64 is set.
> > 
> > PCI_PREF_RANGE_TYPE_64 is when we read BARs. It doesn't indicate
> > anything about PCI Bridge Window registers AFAIK.
> > 
> 
> please double check pci-to-pci bridge 1.2, in page 47.

My apologies. You are correct:
    The bottom 4 bits of both the Prefetchable Memory Base and
    Prefetchable Memory Limit registers are read-only, contain
    the same value, and encode whether or not the bridge supports
    64-bit addresses. If these four bits have the value 0h, then
    the bridge supports only 32 bit addresses. If these four bits
    have the value 01h, then the bridge supports 64-bit addresses
    and the Prefetchable Base Upper 32 Bits and Prefetchable Limit
    Upper 32 Bits registers hold the rest of the 64-bit prefetchable
    base and limit addresses respectively.

thanks,
grant