[RELEASE] LTTng 0.181 for Linux kernel 2.6.32

[RELEASE] LTTng 0.181 for Linux kernel 2.6.32

[Mathieu Desnoyers]

Hi,

I just released LTTng 0.181 for Linux kernel 2.6.32. All packages and
links to the git tree can be found at:

http://www.lttng.org

Comment and feedback are always welcome.

Thanks,

Mathieu

-- 
Mathieu Desnoyers
OpenPGP key fingerprint: 8CD5 52C3 8E3C 4140 715F  BA06 3F25 A8FE 3BAE 9A68

Re: [RELEASE] LTTng 0.181 for Linux kernel 2.6.32

[Josh Boyer]

On Fri, Dec 04, 2009 at 11:06:33AM -0500, Mathieu Desnoyers wrote:
>Hi,
>
>I just released LTTng 0.181 for Linux kernel 2.6.32. All packages and
>links to the git tree can be found at:
>
>http://www.lttng.org
>
>Comment and feedback are always welcome.

This fails to build for PowerPC 44x.  The following trivial patch fixes it.

josh

From: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Subject: Fix LTTng 0.181 compilation on PowerPC

LTTng fails to build on powerpc due to a missing #include in the instrumented
arch/powerpc/kernel/timer.c file.  Fix it.

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>

---

diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index 5465ab2..3e7f6e4 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -54,6 +54,7 @@
 #include <linux/irq.h>
 #include <linux/delay.h>
 #include <linux/perf_event.h>
+#include <trace/trap.h>
 
 #include <asm/io.h>
 #include <asm/processor.h>

Re: [RELEASE] LTTng 0.181 for Linux kernel 2.6.32

[Felipe Balbi]

[-- Attachment #1: Type: text/plain, Size: 418 bytes --]

Hi,

On Fri, Dec 04, 2009 at 05:06:33PM +0100, ext Mathieu Desnoyers wrote:
>I just released LTTng 0.181 for Linux kernel 2.6.32. All packages and
>links to the git tree can be found at:
>
>http://www.lttng.org
>
>Comment and feedback are always welcome.

with the two attached patches, omap tree should be fine.

I changed the extern clocksource pointer to clocksource_default_clock()
hope that's correct.

-- 
balbi

[-- Attachment #2: arm-omap-lttng-fix-build-breakage.patch --]
[-- Type: text/x-diff, Size: 2164 bytes --]

arm: omap: lttng: fix build breakage

Fix compilation with lttng patches applied on omap.

Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com>
Index: linux-omap-2.6/arch/arm/mach-omap2/trace-clock.c
===================================================================
--- linux-omap-2.6.orig/arch/arm/mach-omap2/trace-clock.c	2009-12-13 21:22:09.554137130 +0200
+++ linux-omap-2.6/arch/arm/mach-omap2/trace-clock.c	2009-12-13 21:31:59.482441303 +0200
@@ -12,12 +12,9 @@
 #include <linux/timer.h>
 #include <linux/spinlock.h>
 #include <linux/init.h>
-#include <mach/dmtimer.h>
+#include <plat/dmtimer.h>
 #include <mach/trace-clock.h>
 
-/* Need direct access to the clock from kernel/time/timekeeping.c */
-extern struct clocksource *clock;
-
 /* 32KHz counter count save upon PM sleep */
 static u32 saved_32k_count;
 static u64 saved_trace_clock;
@@ -124,6 +121,7 @@
 
 void _start_trace_clock(void)
 {
+	struct clocksource *clock = clocksource_default_clock();
 	unsigned long flags;
 	unsigned int count_32k, count_trace_clock;
 	u32 regval;
@@ -149,7 +147,7 @@
 	 */
 	ref_time = saved_trace_clock;
 	local_irq_save(flags);
-	count_32k = clocksource_read(clock);
+	count_32k = clock->read(clock);
 	prev_time = trace_clock_read64();
 	/*
 	 * Delta done on 32-bits, then casted to u64. Must guarantee
@@ -190,7 +188,9 @@
 
 void _stop_trace_clock(void)
 {
-	saved_32k_count = clocksource_read(clock);
+	struct clocksource *clock = clocksource_default_clock();
+
+	saved_32k_count = clock->read(clock);
 	saved_trace_clock = trace_clock_read64();
 	del_timer_sync(&clear_ccnt_ms_timer);
 	put_synthetic_tsc();
Index: linux-omap-2.6/arch/arm/plat-omap/include/mach/trace-clock.h
===================================================================
--- linux-omap-2.6.orig/arch/arm/plat-omap/include/mach/trace-clock.h	2009-12-13 21:22:16.818137314 +0200
+++ linux-omap-2.6/arch/arm/plat-omap/include/mach/trace-clock.h	2009-12-13 21:36:09.926137740 +0200
@@ -9,7 +9,7 @@
 
 #include <linux/clk.h>
 #include <asm/system.h>
-#include <mach/dmtimer.h>
+#include <plat/dmtimer.h>
 
 /*
  * Number of hardware clock bits. The higher order bits are expected to be 0.

[-- Attachment #3: arm-omap-lttng-move-mach-omap2-include-mach.patch --]
[-- Type: text/x-diff, Size: 6281 bytes --]

arm: omap: lttng: move to mach-omap2/include/mach

Move the file to expected location

Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com>
Index: linux-omap-2.6/arch/arm/plat-omap/include/mach/trace-clock.h
===================================================================
--- linux-omap-2.6.orig/arch/arm/plat-omap/include/mach/trace-clock.h	2009-12-13 21:38:57.794137510 +0200
+++ /dev/null	1970-01-01 00:00:00.000000000 +0000
@@ -1,96 +0,0 @@
-/*
- * Copyright (C) 2009 Mathieu Desnoyers
- *
- * Trace clock ARM OMAP3 definitions.
- */
-
-#ifndef _ASM_ARM_TRACE_CLOCK_OMAP3_H
-#define _ASM_ARM_TRACE_CLOCK_OMAP3_H
-
-#include <linux/clk.h>
-#include <asm/system.h>
-#include <plat/dmtimer.h>
-
-/*
- * Number of hardware clock bits. The higher order bits are expected to be 0.
- * If the hardware clock source has more than 32 bits, the bits higher than the
- * 32nd will be truncated by a cast to a 32 bits unsigned. Range : 1 - 32.
- * (too few bits would be unrealistic though, since we depend on the timer to
- * detect the overflows).
- * OMAP3-specific : we clear bit 31 periodically so it never overflows. There is
- * a hardware bug with CP14 and CP15 being executed at the same time a ccnt overflow
- * occurs.
- *
- * Siarhei Siamashka <siarhei.siamashka@nokia.com> :
- * Performance monitoring unit breaks if somebody is accessing CP14/CP15
- * coprocessor register exactly at the same time as CCNT overflows (regardless
- * of the fact if generation of interrupts is enabled or not). A workaround
- * suggested by ARM was to never allow it to overflow and reset it
- * periodically.
- */
-#define TC_HW_BITS			31
-
-/* Expected maximum interrupt latency in ms : 15ms, *2 for security */
-#define TC_EXPECTED_INTERRUPT_LATENCY	30
-
-extern u64 trace_clock_read_synthetic_tsc(void);
-extern void _trace_clock_write_synthetic_tsc(u64 value);
-extern struct omap_dm_timer *trace_clock_timer;
-extern unsigned long long cpu_hz;
-
-/*
- * ARM OMAP3 timers only return 32-bits values. We ened to extend it to a
- * 64-bit value, which is provided by trace-clock-32-to-64.
- */
-extern u64 trace_clock_async_tsc_read(void);
-/*
- * Update done by the architecture upon wakeup.
- */
-extern void _trace_clock_write_synthetic_tsc(u64 value);
-
-static inline u32 read_ccnt(void)
-{
-	u32 val;
-        __asm__ __volatile__ ("mrc p15, 0, %0, c9, c13, 0" : "=r" (val));
-	return val & ~(1 << TC_HW_BITS);
-}
-
-static inline u32 trace_clock_read32(void)
-{
-	u32 val;
-
-	isb();
-	val = read_ccnt();
-	isb();
-	return val;
-}
-
-static inline u64 trace_clock_read64(void)
-{
-	return trace_clock_read_synthetic_tsc();
-}
-
-static inline u64 trace_clock_frequency(void)
-{
-	return cpu_hz;
-}
-
-static inline u32 trace_clock_freq_scale(void)
-{
-	return 1;
-}
-
-extern void get_trace_clock(void);
-extern void put_trace_clock(void);
-extern void get_synthetic_tsc(void);
-extern void put_synthetic_tsc(void);
-
-/* Used by the architecture upon wakeup from PM idle */
-extern void start_trace_clock(void);
-/* Used by the architecture when going to PM idle */
-extern void stop_trace_clock(void);
-
-static inline void set_trace_clock_is_sync(int state)
-{
-}
-#endif /* _ASM_MIPS_TRACE_CLOCK_OMAP3_H */
Index: linux-omap-2.6/arch/arm/mach-omap2/include/mach/trace-clock.h
===================================================================
--- /dev/null	1970-01-01 00:00:00.000000000 +0000
+++ linux-omap-2.6/arch/arm/mach-omap2/include/mach/trace-clock.h	2009-12-13 21:22:23.394136616 +0200
@@ -0,0 +1,96 @@
+/*
+ * Copyright (C) 2009 Mathieu Desnoyers
+ *
+ * Trace clock ARM OMAP3 definitions.
+ */
+
+#ifndef _ASM_ARM_TRACE_CLOCK_OMAP3_H
+#define _ASM_ARM_TRACE_CLOCK_OMAP3_H
+
+#include <linux/clk.h>
+#include <asm/system.h>
+#include <plat/dmtimer.h>
+
+/*
+ * Number of hardware clock bits. The higher order bits are expected to be 0.
+ * If the hardware clock source has more than 32 bits, the bits higher than the
+ * 32nd will be truncated by a cast to a 32 bits unsigned. Range : 1 - 32.
+ * (too few bits would be unrealistic though, since we depend on the timer to
+ * detect the overflows).
+ * OMAP3-specific : we clear bit 31 periodically so it never overflows. There is
+ * a hardware bug with CP14 and CP15 being executed at the same time a ccnt overflow
+ * occurs.
+ *
+ * Siarhei Siamashka <siarhei.siamashka@nokia.com> :
+ * Performance monitoring unit breaks if somebody is accessing CP14/CP15
+ * coprocessor register exactly at the same time as CCNT overflows (regardless
+ * of the fact if generation of interrupts is enabled or not). A workaround
+ * suggested by ARM was to never allow it to overflow and reset it
+ * periodically.
+ */
+#define TC_HW_BITS			31
+
+/* Expected maximum interrupt latency in ms : 15ms, *2 for security */
+#define TC_EXPECTED_INTERRUPT_LATENCY	30
+
+extern u64 trace_clock_read_synthetic_tsc(void);
+extern void _trace_clock_write_synthetic_tsc(u64 value);
+extern struct omap_dm_timer *trace_clock_timer;
+extern unsigned long long cpu_hz;
+
+/*
+ * ARM OMAP3 timers only return 32-bits values. We ened to extend it to a
+ * 64-bit value, which is provided by trace-clock-32-to-64.
+ */
+extern u64 trace_clock_async_tsc_read(void);
+/*
+ * Update done by the architecture upon wakeup.
+ */
+extern void _trace_clock_write_synthetic_tsc(u64 value);
+
+static inline u32 read_ccnt(void)
+{
+	u32 val;
+        __asm__ __volatile__ ("mrc p15, 0, %0, c9, c13, 0" : "=r" (val));
+	return val & ~(1 << TC_HW_BITS);
+}
+
+static inline u32 trace_clock_read32(void)
+{
+	u32 val;
+
+	isb();
+	val = read_ccnt();
+	isb();
+	return val;
+}
+
+static inline u64 trace_clock_read64(void)
+{
+	return trace_clock_read_synthetic_tsc();
+}
+
+static inline u64 trace_clock_frequency(void)
+{
+	return cpu_hz;
+}
+
+static inline u32 trace_clock_freq_scale(void)
+{
+	return 1;
+}
+
+extern void get_trace_clock(void);
+extern void put_trace_clock(void);
+extern void get_synthetic_tsc(void);
+extern void put_synthetic_tsc(void);
+
+/* Used by the architecture upon wakeup from PM idle */
+extern void start_trace_clock(void);
+/* Used by the architecture when going to PM idle */
+extern void stop_trace_clock(void);
+
+static inline void set_trace_clock_is_sync(int state)
+{
+}
+#endif /* _ASM_MIPS_TRACE_CLOCK_OMAP3_H */

Re: [ltt-dev] [RELEASE] LTTng 0.181 for Linux kernel 2.6.32

[Mathieu Desnoyers]

* Josh Boyer (jwboyer@linux.vnet.ibm.com) wrote:
> On Fri, Dec 04, 2009 at 11:06:33AM -0500, Mathieu Desnoyers wrote:
> >Hi,
> >
> >I just released LTTng 0.181 for Linux kernel 2.6.32. All packages and
> >links to the git tree can be found at:
> >
> >http://www.lttng.org
> >
> >Comment and feedback are always welcome.
> 
> This fails to build for PowerPC 44x.  The following trivial patch fixes it.

Merged, will be in LTTng 0.182.

Thanks !

Mathieu

> 
> josh
> 
> From: Josh Boyer <jwboyer@linux.vnet.ibm.com>
> Subject: Fix LTTng 0.181 compilation on PowerPC
> 
> LTTng fails to build on powerpc due to a missing #include in the instrumented
> arch/powerpc/kernel/timer.c file.  Fix it.
> 
> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
> 
> ---
> 
> diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
> index 5465ab2..3e7f6e4 100644
> --- a/arch/powerpc/kernel/time.c
> +++ b/arch/powerpc/kernel/time.c
> @@ -54,6 +54,7 @@
>  #include <linux/irq.h>
>  #include <linux/delay.h>
>  #include <linux/perf_event.h>
> +#include <trace/trap.h>
>  
>  #include <asm/io.h>
>  #include <asm/processor.h>
> 
> 
> _______________________________________________
> ltt-dev mailing list
> ltt-dev@lists.casi.polymtl.ca
> http://lists.casi.polymtl.ca/cgi-bin/mailman/listinfo/ltt-dev
> 

-- 
Mathieu Desnoyers
OpenPGP key fingerprint: 8CD5 52C3 8E3C 4140 715F  BA06 3F25 A8FE 3BAE 9A68

Re: [ltt-dev] [RELEASE] LTTng 0.181 for Linux kernel 2.6.32

[Mathieu Desnoyers]

* Felipe Balbi (felipe.balbi@nokia.com) wrote:
> Hi,
>
> On Fri, Dec 04, 2009 at 05:06:33PM +0100, ext Mathieu Desnoyers wrote:
>> I just released LTTng 0.181 for Linux kernel 2.6.32. All packages and
>> links to the git tree can be found at:
>>
>> http://www.lttng.org
>>
>> Comment and feedback are always welcome.
>
> with the two attached patches, omap tree should be fine.
>

Hi Felipe,

I am currently working in the linux-2.6-omap pm tree to support power
management and DVFS for the omap3. Given the changes I made in the omap
tree, I think it's best if I merge the parts that fit back into the
lttng tree based on mainline rather than merging your patches.

I agree with your suggestion to move the header to
arch/arm/mach-omap2/include/mach/trace-clock.h

> I changed the extern clocksource pointer to clocksource_default_clock()
> hope that's correct.

Hrm, I really need this one to be the 32k clock. I am making sure LTTng
depends on this clock being available on the omap3. I use the low-level
value and expect it to run at 32768 HZ. I also need it to stay active
when the system is in standby mode.

Thanks,

Mathieu

>
> -- 
> balbi

> arm: omap: lttng: fix build breakage
> 
> Fix compilation with lttng patches applied on omap.
> 
> Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com>
> Index: linux-omap-2.6/arch/arm/mach-omap2/trace-clock.c
> ===================================================================
> --- linux-omap-2.6.orig/arch/arm/mach-omap2/trace-clock.c	2009-12-13 21:22:09.554137130 +0200
> +++ linux-omap-2.6/arch/arm/mach-omap2/trace-clock.c	2009-12-13 21:31:59.482441303 +0200
> @@ -12,12 +12,9 @@
>  #include <linux/timer.h>
>  #include <linux/spinlock.h>
>  #include <linux/init.h>
> -#include <mach/dmtimer.h>
> +#include <plat/dmtimer.h>
>  #include <mach/trace-clock.h>
>  
> -/* Need direct access to the clock from kernel/time/timekeeping.c */
> -extern struct clocksource *clock;
> -
>  /* 32KHz counter count save upon PM sleep */
>  static u32 saved_32k_count;
>  static u64 saved_trace_clock;
> @@ -124,6 +121,7 @@
>  
>  void _start_trace_clock(void)
>  {
> +	struct clocksource *clock = clocksource_default_clock();
>  	unsigned long flags;
>  	unsigned int count_32k, count_trace_clock;
>  	u32 regval;
> @@ -149,7 +147,7 @@
>  	 */
>  	ref_time = saved_trace_clock;
>  	local_irq_save(flags);
> -	count_32k = clocksource_read(clock);
> +	count_32k = clock->read(clock);
>  	prev_time = trace_clock_read64();
>  	/*
>  	 * Delta done on 32-bits, then casted to u64. Must guarantee
> @@ -190,7 +188,9 @@
>  
>  void _stop_trace_clock(void)
>  {
> -	saved_32k_count = clocksource_read(clock);
> +	struct clocksource *clock = clocksource_default_clock();
> +
> +	saved_32k_count = clock->read(clock);
>  	saved_trace_clock = trace_clock_read64();
>  	del_timer_sync(&clear_ccnt_ms_timer);
>  	put_synthetic_tsc();
> Index: linux-omap-2.6/arch/arm/plat-omap/include/mach/trace-clock.h
> ===================================================================
> --- linux-omap-2.6.orig/arch/arm/plat-omap/include/mach/trace-clock.h	2009-12-13 21:22:16.818137314 +0200
> +++ linux-omap-2.6/arch/arm/plat-omap/include/mach/trace-clock.h	2009-12-13 21:36:09.926137740 +0200
> @@ -9,7 +9,7 @@
>  
>  #include <linux/clk.h>
>  #include <asm/system.h>
> -#include <mach/dmtimer.h>
> +#include <plat/dmtimer.h>
>  
>  /*
>   * Number of hardware clock bits. The higher order bits are expected to be 0.

> arm: omap: lttng: move to mach-omap2/include/mach
> 
> Move the file to expected location
> 
> Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com>
> Index: linux-omap-2.6/arch/arm/plat-omap/include/mach/trace-clock.h
> ===================================================================
> --- linux-omap-2.6.orig/arch/arm/plat-omap/include/mach/trace-clock.h	2009-12-13 21:38:57.794137510 +0200
> +++ /dev/null	1970-01-01 00:00:00.000000000 +0000
> @@ -1,96 +0,0 @@
> -/*
> - * Copyright (C) 2009 Mathieu Desnoyers
> - *
> - * Trace clock ARM OMAP3 definitions.
> - */
> -
> -#ifndef _ASM_ARM_TRACE_CLOCK_OMAP3_H
> -#define _ASM_ARM_TRACE_CLOCK_OMAP3_H
> -
> -#include <linux/clk.h>
> -#include <asm/system.h>
> -#include <plat/dmtimer.h>
> -
> -/*
> - * Number of hardware clock bits. The higher order bits are expected to be 0.
> - * If the hardware clock source has more than 32 bits, the bits higher than the
> - * 32nd will be truncated by a cast to a 32 bits unsigned. Range : 1 - 32.
> - * (too few bits would be unrealistic though, since we depend on the timer to
> - * detect the overflows).
> - * OMAP3-specific : we clear bit 31 periodically so it never overflows. There is
> - * a hardware bug with CP14 and CP15 being executed at the same time a ccnt overflow
> - * occurs.
> - *
> - * Siarhei Siamashka <siarhei.siamashka@nokia.com> :
> - * Performance monitoring unit breaks if somebody is accessing CP14/CP15
> - * coprocessor register exactly at the same time as CCNT overflows (regardless
> - * of the fact if generation of interrupts is enabled or not). A workaround
> - * suggested by ARM was to never allow it to overflow and reset it
> - * periodically.
> - */
> -#define TC_HW_BITS			31
> -
> -/* Expected maximum interrupt latency in ms : 15ms, *2 for security */
> -#define TC_EXPECTED_INTERRUPT_LATENCY	30
> -
> -extern u64 trace_clock_read_synthetic_tsc(void);
> -extern void _trace_clock_write_synthetic_tsc(u64 value);
> -extern struct omap_dm_timer *trace_clock_timer;
> -extern unsigned long long cpu_hz;
> -
> -/*
> - * ARM OMAP3 timers only return 32-bits values. We ened to extend it to a
> - * 64-bit value, which is provided by trace-clock-32-to-64.
> - */
> -extern u64 trace_clock_async_tsc_read(void);
> -/*
> - * Update done by the architecture upon wakeup.
> - */
> -extern void _trace_clock_write_synthetic_tsc(u64 value);
> -
> -static inline u32 read_ccnt(void)
> -{
> -	u32 val;
> -        __asm__ __volatile__ ("mrc p15, 0, %0, c9, c13, 0" : "=r" (val));
> -	return val & ~(1 << TC_HW_BITS);
> -}
> -
> -static inline u32 trace_clock_read32(void)
> -{
> -	u32 val;
> -
> -	isb();
> -	val = read_ccnt();
> -	isb();
> -	return val;
> -}
> -
> -static inline u64 trace_clock_read64(void)
> -{
> -	return trace_clock_read_synthetic_tsc();
> -}
> -
> -static inline u64 trace_clock_frequency(void)
> -{
> -	return cpu_hz;
> -}
> -
> -static inline u32 trace_clock_freq_scale(void)
> -{
> -	return 1;
> -}
> -
> -extern void get_trace_clock(void);
> -extern void put_trace_clock(void);
> -extern void get_synthetic_tsc(void);
> -extern void put_synthetic_tsc(void);
> -
> -/* Used by the architecture upon wakeup from PM idle */
> -extern void start_trace_clock(void);
> -/* Used by the architecture when going to PM idle */
> -extern void stop_trace_clock(void);
> -
> -static inline void set_trace_clock_is_sync(int state)
> -{
> -}
> -#endif /* _ASM_MIPS_TRACE_CLOCK_OMAP3_H */
> Index: linux-omap-2.6/arch/arm/mach-omap2/include/mach/trace-clock.h
> ===================================================================
> --- /dev/null	1970-01-01 00:00:00.000000000 +0000
> +++ linux-omap-2.6/arch/arm/mach-omap2/include/mach/trace-clock.h	2009-12-13 21:22:23.394136616 +0200
> @@ -0,0 +1,96 @@
> +/*
> + * Copyright (C) 2009 Mathieu Desnoyers
> + *
> + * Trace clock ARM OMAP3 definitions.
> + */
> +
> +#ifndef _ASM_ARM_TRACE_CLOCK_OMAP3_H
> +#define _ASM_ARM_TRACE_CLOCK_OMAP3_H
> +
> +#include <linux/clk.h>
> +#include <asm/system.h>
> +#include <plat/dmtimer.h>
> +
> +/*
> + * Number of hardware clock bits. The higher order bits are expected to be 0.
> + * If the hardware clock source has more than 32 bits, the bits higher than the
> + * 32nd will be truncated by a cast to a 32 bits unsigned. Range : 1 - 32.
> + * (too few bits would be unrealistic though, since we depend on the timer to
> + * detect the overflows).
> + * OMAP3-specific : we clear bit 31 periodically so it never overflows. There is
> + * a hardware bug with CP14 and CP15 being executed at the same time a ccnt overflow
> + * occurs.
> + *
> + * Siarhei Siamashka <siarhei.siamashka@nokia.com> :
> + * Performance monitoring unit breaks if somebody is accessing CP14/CP15
> + * coprocessor register exactly at the same time as CCNT overflows (regardless
> + * of the fact if generation of interrupts is enabled or not). A workaround
> + * suggested by ARM was to never allow it to overflow and reset it
> + * periodically.
> + */
> +#define TC_HW_BITS			31
> +
> +/* Expected maximum interrupt latency in ms : 15ms, *2 for security */
> +#define TC_EXPECTED_INTERRUPT_LATENCY	30
> +
> +extern u64 trace_clock_read_synthetic_tsc(void);
> +extern void _trace_clock_write_synthetic_tsc(u64 value);
> +extern struct omap_dm_timer *trace_clock_timer;
> +extern unsigned long long cpu_hz;
> +
> +/*
> + * ARM OMAP3 timers only return 32-bits values. We ened to extend it to a
> + * 64-bit value, which is provided by trace-clock-32-to-64.
> + */
> +extern u64 trace_clock_async_tsc_read(void);
> +/*
> + * Update done by the architecture upon wakeup.
> + */
> +extern void _trace_clock_write_synthetic_tsc(u64 value);
> +
> +static inline u32 read_ccnt(void)
> +{
> +	u32 val;
> +        __asm__ __volatile__ ("mrc p15, 0, %0, c9, c13, 0" : "=r" (val));
> +	return val & ~(1 << TC_HW_BITS);
> +}
> +
> +static inline u32 trace_clock_read32(void)
> +{
> +	u32 val;
> +
> +	isb();
> +	val = read_ccnt();
> +	isb();
> +	return val;
> +}
> +
> +static inline u64 trace_clock_read64(void)
> +{
> +	return trace_clock_read_synthetic_tsc();
> +}
> +
> +static inline u64 trace_clock_frequency(void)
> +{
> +	return cpu_hz;
> +}
> +
> +static inline u32 trace_clock_freq_scale(void)
> +{
> +	return 1;
> +}
> +
> +extern void get_trace_clock(void);
> +extern void put_trace_clock(void);
> +extern void get_synthetic_tsc(void);
> +extern void put_synthetic_tsc(void);
> +
> +/* Used by the architecture upon wakeup from PM idle */
> +extern void start_trace_clock(void);
> +/* Used by the architecture when going to PM idle */
> +extern void stop_trace_clock(void);
> +
> +static inline void set_trace_clock_is_sync(int state)
> +{
> +}
> +#endif /* _ASM_MIPS_TRACE_CLOCK_OMAP3_H */

> _______________________________________________
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> http://lists.casi.polymtl.ca/cgi-bin/mailman/listinfo/ltt-dev


-- 
Mathieu Desnoyers
OpenPGP key fingerprint: 8CD5 52C3 8E3C 4140 715F  BA06 3F25 A8FE 3BAE 9A68

[RELEASE] LTTng 0.182 for Linux kernel 2.6.32

[Mathieu Desnoyers]

Hi !

I just released LTTng 0.182 for mainline kernel 2.6.32. It fixes ppc440
build and, more importantly, adds full support for ARM omap3 to the
trace clock:

- Power management support (suspend/resume, idle)
- DVFS support

Basically, the infrastructure is based on the 32k timer as external
time source, but uses the ccnt register to read the time base quickly at
each event. The trace clock is responsible for extending the 32-bit
counter to 64-bit, and for resynchronizing it on the 32k clock when
necessary.

I did all development and testing of the omap3 features on top of a
linux-omap-2.6 2.6.32-rc8 kernel and then reintegrated the patches in
the main LTTng tree. I only build-tested the port to main LTTng tree.

I should put the linux-omap-2.6-lttng tree online shortly, along with
the corresponding patchset.

Feedback is welcome !

Thanks,

Mathieu

-- 
Mathieu Desnoyers
OpenPGP key fingerprint: 8CD5 52C3 8E3C 4140 715F  BA06 3F25 A8FE 3BAE 9A68

[RELEASE] LTTng 0.182o for 2.6.32-rc8 omap/pm tree

[Mathieu Desnoyers]

* Mathieu Desnoyers (mathieu.desnoyers@polymtl.ca) wrote:
> Hi !
> 
> I just released LTTng 0.182 for mainline kernel 2.6.32. It fixes ppc440
> build and, more importantly, adds full support for ARM omap3 to the
> trace clock:
> 
> - Power management support (suspend/resume, idle)
> - DVFS support
> 
> Basically, the infrastructure is based on the 32k timer as external
> time source, but uses the ccnt register to read the time base quickly at
> each event. The trace clock is responsible for extending the 32-bit
> counter to 64-bit, and for resynchronizing it on the 32k clock when
> necessary.
> 
> I did all development and testing of the omap3 features on top of a
> linux-omap-2.6 2.6.32-rc8 kernel and then reintegrated the patches in
> the main LTTng tree. I only build-tested the port to main LTTng tree.
> 
> I should put the linux-omap-2.6-lttng tree online shortly, along with
> the corresponding patchset.

.. and the corresponding patchset and git tree for the omap/pm tree,
based on kernel 2.6.32-rc8:

git://lttng.org/linux-omap-pm-2.6-lttng.git

http://lttng.org/files/lttng/patch-omap-pm-2.6.32-rc8-lttng-0.182o.tar.bz2

(it is actually a mix of lttng 0.180 to 0.182).

Have fun !

Mathieu

> 
> Feedback is welcome !
> 
> Thanks,
> 
> Mathieu
> 
> -- 
> Mathieu Desnoyers
> OpenPGP key fingerprint: 8CD5 52C3 8E3C 4140 715F  BA06 3F25 A8FE 3BAE 9A68
> 
> _______________________________________________
> ltt-dev mailing list
> ltt-dev@lists.casi.polymtl.ca
> http://lists.casi.polymtl.ca/cgi-bin/mailman/listinfo/ltt-dev
> 

-- 
Mathieu Desnoyers
OpenPGP key fingerprint: 8CD5 52C3 8E3C 4140 715F  BA06 3F25 A8FE 3BAE 9A68

[RELEASE] LTTV 0.12.25

[Mathieu Desnoyers]

LTTV 0.12.25 can be useful to view traces taken from an ARM omap3 board.
This release works around a problem with irq tables experienced with IRQ
IDs > 256, which I have seen on the ARM omap3.

Available at http://lttng.org

Thanks,

Mathieu

-- 
Mathieu Desnoyers
OpenPGP key fingerprint: 8CD5 52C3 8E3C 4140 715F  BA06 3F25 A8FE 3BAE 9A68

[RELEASE] LTTng 0.183/0.183o

[Mathieu Desnoyers]

* Mathieu Desnoyers (mathieu.desnoyers@polymtl.ca) wrote:
> * Mathieu Desnoyers (mathieu.desnoyers@polymtl.ca) wrote:
> > Hi !
> > 
> > I just released LTTng 0.182 for mainline kernel 2.6.32. It fixes ppc440
> > build and, more importantly, adds full support for ARM omap3 to the
> > trace clock:
> > 
> > - Power management support (suspend/resume, idle)
> > - DVFS support
> > 
> > Basically, the infrastructure is based on the 32k timer as external
> > time source, but uses the ccnt register to read the time base quickly at
> > each event. The trace clock is responsible for extending the 32-bit
> > counter to 64-bit, and for resynchronizing it on the 32k clock when
> > necessary.
> > 
> > I did all development and testing of the omap3 features on top of a
> > linux-omap-2.6 2.6.32-rc8 kernel and then reintegrated the patches in
> > the main LTTng tree. I only build-tested the port to main LTTng tree.
> > 
> > I should put the linux-omap-2.6-lttng tree online shortly, along with
> > the corresponding patchset.
> 
> .. and the corresponding patchset and git tree for the omap/pm tree,
> based on kernel 2.6.32-rc8:
> 
> git://lttng.org/linux-omap-pm-2.6-lttng.git
> 
> http://lttng.org/files/lttng/patch-omap-pm-2.6.32-rc8-lttng-0.182o.tar.bz2
> 
> (it is actually a mix of lttng 0.180 to 0.182).

Version 0.183/0.183o turns the periodic resync timer into a timer only
launched when actual DVFS frequency change occurs (it is used to ensure
very frequent DVFS freq. change do not generate a high rate of 32k clock
reads).

Also, I don't want to take any chance, and therefore don't assume the
ccnt register is stopped in idle. This version now additionally makes
sure to stop the ccnt register when going to idle/sleep.

Mathieu


> 
> Have fun !
> 
> Mathieu
> 
> > 
> > Feedback is welcome !
> > 
> > Thanks,
> > 
> > Mathieu
> > 
> > -- 
> > Mathieu Desnoyers
> > OpenPGP key fingerprint: 8CD5 52C3 8E3C 4140 715F  BA06 3F25 A8FE 3BAE 9A68
> > 
> > _______________________________________________
> > ltt-dev mailing list
> > ltt-dev@lists.casi.polymtl.ca
> > http://lists.casi.polymtl.ca/cgi-bin/mailman/listinfo/ltt-dev
> > 
> 
> -- 
> Mathieu Desnoyers
> OpenPGP key fingerprint: 8CD5 52C3 8E3C 4140 715F  BA06 3F25 A8FE 3BAE 9A68
> 
> _______________________________________________
> ltt-dev mailing list
> ltt-dev@lists.casi.polymtl.ca
> http://lists.casi.polymtl.ca/cgi-bin/mailman/listinfo/ltt-dev
> 

-- 
Mathieu Desnoyers
OpenPGP key fingerprint: 8CD5 52C3 8E3C 4140 715F  BA06 3F25 A8FE 3BAE 9A68