From: Jean Delvare <khali@linux-fr.org>
To: Yuhong Bao <yuhongbao_386@hotmail.com>
Cc: <yong.y.wang@linux.intel.com>, <linux-kernel@vger.kernel.org>,
<huaxu.wan@intel.com>, <lm-sensors@lm-sensors.org>
Subject: Re: [lm-sensors] [PATCH] hwmon: (coretemp) Fix TjMax for Atom N450/D410/D510 CPUs
Date: Sun, 17 Jan 2010 16:15:18 +0100 [thread overview]
Message-ID: <20100117161518.4912be7c@hyperion.delvare> (raw)
In-Reply-To: <SNT125-W147C55AB6EB65D41CAAFFFC3680@phx.gbl>
On Fri, 15 Jan 2010 18:02:27 -0800, Yuhong Bao wrote:
>
> > No matter what chipset or gfx you use with the new Atom chip, the
> > integrated memory controller (IMC) will always be used. This patch
> > checks the presence of that IMC. Hope this clarifies.
> To be more precise, Pine Trail Atoms integrate the entire northbridge, including the integrated graphics and the memory controller into the CPU, and there is a DMI connection to the southbridge, which is the Intel NM10, that is NOT integrated.
What prevents another vendor from selling a compatible south bridge
then?
I start believing that we'd rather identify these Atom models using
CPUID rather than a PCI device.
--
Jean Delvare
next prev parent reply other threads:[~2010-01-17 15:15 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-12-24 7:31 [PATCH] hwmon: (coretemp) Fix TjMax for Atom N450/D410/D510 CPUs Yong Wang
2010-01-06 15:08 ` Jean Delvare
2010-01-10 19:06 ` [lm-sensors] " Jean Delvare
2010-01-11 6:20 ` Yong Wang
2010-01-16 2:02 ` Yuhong Bao
2010-01-17 15:15 ` Jean Delvare [this message]
2010-01-17 19:29 ` Robert Hancock
2010-01-17 20:05 ` Jean Delvare
2010-01-18 6:58 ` Yong Wang
2010-01-18 8:14 ` Jean Delvare
2010-01-18 8:27 ` Yong Wang
2010-01-18 7:21 ` Huaxu Wan
2010-01-18 8:07 ` Jean Delvare
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