Re: [tip:x86/cpu] x86, cacheinfo: Remove NUMA dependency, fix for D1 Isntanbul

[Borislav Petkov <borislav.petkov@amd.com>]

On Tue, Feb 16, 2010 at 03:02:46PM +0100, Ingo Molnar wrote:
> 
> * tip-bot for Borislav Petkov <borislav.petkov@amd.com> wrote:
> 
> > Commit-ID:  472bf751b56324f8c96d97ada3c9dcdc8b2ec4f7
> > Gitweb:     http://git.kernel.org/tip/472bf751b56324f8c96d97ada3c9dcdc8b2ec4f7
> > Author:     Borislav Petkov <borislav.petkov@amd.com>
> > AuthorDate: Mon, 15 Feb 2010 12:43:56 +0100
> > Committer:  H. Peter Anvin <hpa@zytor.com>
> > CommitDate: Mon, 15 Feb 2010 12:32:48 -0800
> > 
> > x86, cacheinfo: Remove NUMA dependency, fix for D1 Isntanbul
> 
> FYI, this commit broke the build in -tip testing:
> 
>  arch/x86/built-in.o: In function `store_cache_disable':
>  intel_cacheinfo.c:(.text+0xc509): undefined reference to `amd_get_nb_id'
>  arch/x86/built-in.o: In function `show_cache_disable':
>  intel_cacheinfo.c:(.text+0xc7d3): undefined reference to `amd_get_nb_id'

Argh,

In the attached .config we have

# CONFIG_CPU_SUP_AMD is not set

but <arch/x86/kernel/cpu/amd.c> is built only when CONFIG_CPU_SUP_AMD is
enabled. Possible fixes are:

a) push amd_get_nb_id() into <asm/processor.h>.

b) make L3 cache index disable code dependent on CONFIG_CPU_SUP_AMD

IMO, a) is a short-term fix while b) is the better thing to do. I might
be able to get something done in time for the merge window. Let me know
which way you want to go.

Thanks.

-- 
Regards/Gruss,
Boris.

-
Advanced Micro Devices, Inc.
Operating Systems Research Center