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From: Borislav Petkov <borislav.petkov@amd.com>
To: Ingo Molnar <mingo@elte.hu>
Cc: mingo@redhat.com, hpa@zytor.com, linux-kernel@vger.kernel.org,
	tglx@linutronix.de, linux-tip-commits@vger.kernel.org
Subject: [PATCH 1/2] x86, cacheinfo: Remove NUMA dependency, fix for Fam10h, rev.D1
Date: Thu, 18 Feb 2010 19:43:39 +0100	[thread overview]
Message-ID: <20100218184339.GG20473@aftab> (raw)
In-Reply-To: <20100216140246.GA31213@elte.hu>

On Tue, Feb 16, 2010 at 03:02:46PM +0100, Ingo Molnar wrote:

> Also, there's a typo in the changelog: s/Isntanbul/Istanbul

--
From: Borislav Petkov <borislav.petkov@amd.com>
Date: Thu, 4 Feb 2010 12:09:07 +0100
Subject: [PATCH 1/2] x86, cacheinfo: Remove NUMA dependency, fix for Fam10h, rev.D1

The show/store_cache_disable routines depend unnecessarily on NUMA's
cpu_to_node and the disabling of cache indices broke when !CONFIG_NUMA.
Remove that dependency by using a helper which is always correct.

While at it, enable L3 Cache Index disable on revD1 Istanbuls which
sport the feature too.

Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
---
 arch/x86/kernel/cpu/intel_cacheinfo.c |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 589b705..be5f5c2 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -327,7 +327,7 @@ amd_check_l3_disable(int index, struct _cpuid4_info_regs *this_leaf)
 
 	/* see errata #382 and #388 */
 	if ((boot_cpu_data.x86 == 0x10) &&
-	    ((boot_cpu_data.x86_model < 0x9) ||
+	    ((boot_cpu_data.x86_model < 0x8) ||
 	     (boot_cpu_data.x86_mask  < 0x1)))
 		return;
 
@@ -744,7 +744,7 @@ static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf,
 				  unsigned int index)
 {
 	int cpu = cpumask_first(to_cpumask(this_leaf->shared_cpu_map));
-	int node = cpu_to_node(cpu);
+	int node = amd_get_nb_id(cpu);
 	struct pci_dev *dev = node_to_k8_nb_misc(node);
 	unsigned int reg = 0;
 
@@ -771,7 +771,7 @@ static ssize_t store_cache_disable(struct _cpuid4_info *this_leaf,
 	const char *buf, size_t count, unsigned int index)
 {
 	int cpu = cpumask_first(to_cpumask(this_leaf->shared_cpu_map));
-	int node = cpu_to_node(cpu);
+	int node = amd_get_nb_id(cpu);
 	struct pci_dev *dev = node_to_k8_nb_misc(node);
 	unsigned long val = 0;
 
-- 
1.6.4.2


-- 
Regards/Gruss,
Boris.

--
Advanced Micro Devices, Inc.
Operating Systems Research Center


  parent reply	other threads:[~2010-02-18 20:41 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-02-15 11:43 [RESEND PATCH] x86, cacheinfo: Remove NUMA dependency Borislav Petkov
2010-02-15 21:24 ` [tip:x86/cpu] x86, cacheinfo: Remove NUMA dependency, fix for D1 Isntanbul tip-bot for Borislav Petkov
2010-02-16 14:02   ` Ingo Molnar
2010-02-16 15:26     ` Borislav Petkov
2010-02-18 18:42     ` [PATCH 2/2] x86, cacheinfo: Enable L3 CID only on AMD Borislav Petkov
2010-02-19  6:09       ` [tip:x86/cpu] " tip-bot for Borislav Petkov
2010-02-18 18:43     ` Borislav Petkov [this message]
2010-02-19  6:09       ` [tip:x86/cpu] x86, cacheinfo: Remove NUMA dependency, fix for AMD Fam10h rev D1 tip-bot for Borislav Petkov

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