From: Robert Richter <robert.richter@amd.com>
To: Ingo Molnar <mingo@elte.hu>
Cc: Peter Zijlstra <peterz@infradead.org>,
LKML <linux-kernel@vger.kernel.org>,
oprofile-list <oprofile-list@lists.sourceforge.net>
Subject: Re: [PATCH 0/9] oprofile, perf, x86: introduce new functions to reserve perfctrs
Date: Thu, 11 Mar 2010 16:45:46 +0100 [thread overview]
Message-ID: <20100311154546.GD1585@erda.amd.com> (raw)
In-Reply-To: <20100311124716.GH31354@elte.hu>
On 11.03.10 13:47:16, Ingo Molnar wrote:
> * Peter Zijlstra <peterz@infradead.org> wrote:
> > Alternatively, could we maybe further simplify this reservation into:
> >
> > int reserve_pmu(void);
> > void release_pmu(void);
> >
> > And not bother with anything finer grained.
>
> Yeah, that looks quite a bit simpler.
It does not solve the current problem that some parts of the pmu *are*
used simultaneously by different subsystems. But, even if only perf
would be used in the kernel you still can't be sure that all parts of
the pmu are available to be used, you simply don't have it under your
control. So why such limitations as an 'int reserve_pmu(int index)' is
almost the same but provides much more flexibility?
The question already arose if the watchdog would use perf permanently
and thus would block oprofile by making it unusable. The current
reservation code would provide a framework to solves this, sharing
perfctrs with watchdog, perf and oprofile. And, since the pmu becomes
more and more features other than perfctrs, why shouldn't it be
possible to run one feature with perf and the other with oprofile?
> It's all about making it easier to live with legacies anyway - all modern
> facilities will use perf events to access the PMU.
Scheduling events with perf is also 'some sort' of reservation, so
this code could be moved later into perf at all. In this case we also
will have to be able to reserve single counters or features by its
index.
For now, I don't think it is possible to change oprofile to use perf
in a big bang. This will disrupt oprofile users. I want to do the
switch to perf in a series of small changes and patch sets to make
sure, oprofile will not break. And this new reservation code is a step
towards perf.
-Robert
--
Advanced Micro Devices, Inc.
Operating System Research Center
email: robert.richter@amd.com
prev parent reply other threads:[~2010-03-11 15:46 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-03-04 15:22 [PATCH 0/9] oprofile, perf, x86: introduce new functions to reserve perfctrs Robert Richter
2010-03-04 15:22 ` [PATCH 1/9] perf, x86: reduce number of CONFIG_X86_LOCAL_APIC macros Robert Richter
2010-03-04 15:22 ` [PATCH 2/9] oprofile, perf, x86: do not allocate evntsel counter msr Robert Richter
2010-03-04 15:22 ` [PATCH 3/9] oprofile, perf, x86: introduce new functions to reserve perfctrs by index Robert Richter
2010-03-20 5:45 ` Andi Kleen
2010-03-25 15:52 ` Robert Richter
2010-03-25 19:33 ` Andi Kleen
2010-03-04 15:22 ` [PATCH 4/9] tsc, x86: use new perfctr reservation functions in tsc code Robert Richter
2010-03-04 15:22 ` [PATCH 5/9] perf, x86: use new perfctr reservation functions in perf code Robert Richter
2010-03-04 15:22 ` [PATCH 6/9] oprofile/x86: rework error handler in nmi_setup() Robert Richter
2010-03-04 15:22 ` [PATCH 7/9] oprofile/x86: return -EBUSY if counters are already reserved Robert Richter
2010-03-04 15:22 ` [PATCH 8/9] oprofile/x86: group IBS code Robert Richter
2010-03-04 15:22 ` [PATCH 9/9] oprofile/x86: implement perfctr reservation for IBS Robert Richter
2010-03-04 17:59 ` [PATCH 0/9] oprofile, perf, x86: introduce new functions to reserve perfctrs Peter Zijlstra
2010-03-11 11:48 ` Peter Zijlstra
2010-03-11 12:47 ` Ingo Molnar
2010-03-11 15:45 ` Robert Richter [this message]
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