From: Cyrill Gorcunov <gorcunov@gmail.com>
To: Ingo Molnar <mingo@elte.hu>
Cc: Lin Ming <ming.m.lin@intel.com>,
Peter Zijlstra <peterz@infradead.org>,
lkml <linux-kernel@vger.kernel.org>
Subject: Re: [RFC][PATCH 2/2] x86,perf: add cache events in p4 PMU
Date: Thu, 18 Mar 2010 23:59:49 +0300 [thread overview]
Message-ID: <20100318205949.GG5062@lenovo> (raw)
In-Reply-To: <20100318160135.GD5062@lenovo>
On Thu, Mar 18, 2010 at 07:01:35PM +0300, Cyrill Gorcunov wrote:
[...]
> > So i've applied your patches. Cyrill, what do you think?
>
> Sorry for a bit delay, yes, pick it up please. I found that we have an
> issue in escr binding (which is pretty mine error), hope to fix it up
> today. Also I hope to eventually implement raw events this weekend
> but better to base the new code on all this stuff merged. This will
> allow to "take a look" on code structure from a high point and find
> potential caveats.
>
> All-in-one
>
> Reviewed-by: Cyrill Gorcunov <gorcunov@openvz.org>
>
> Thanks a huge, Ming!
>
> >
> > Ingo
> >
> -- Cyrill
Ok, the issue I thought about not really exist. Misfire :)
-- Cyrill
next prev parent reply other threads:[~2010-03-18 20:59 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-03-18 10:33 [RFC][PATCH 2/2] x86,perf: add cache events in p4 PMU Lin Ming
2010-03-18 15:56 ` Ingo Molnar
2010-03-18 16:01 ` Cyrill Gorcunov
2010-03-18 20:59 ` Cyrill Gorcunov [this message]
2010-03-18 17:38 ` [tip:perf/core] perf, x86: Add cache events for the Pentium-4 PMU tip-bot for Lin Ming
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