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Date: Thu, 18 Mar 2010 23:59:49 +0300
From: Cyrill Gorcunov <gorcunov@gmail.com>
To: Ingo Molnar <mingo@elte.hu>
Cc: Lin Ming <ming.m.lin@intel.com>, Peter Zijlstra <peterz@infradead.org>,
       lkml <linux-kernel@vger.kernel.org>
Subject: Re: [RFC][PATCH 2/2] x86,perf: add cache events in p4 PMU
Message-ID: <20100318205949.GG5062@lenovo>
References: <1268908392.13901.128.camel@minggr.sh.intel.com> <20100318155610.GA28061@elte.hu> <20100318160135.GD5062@lenovo>
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On Thu, Mar 18, 2010 at 07:01:35PM +0300, Cyrill Gorcunov wrote:
[...]
> > So i've applied your patches. Cyrill, what do you think?
> 
> Sorry for a bit delay, yes, pick it up please. I found that we have an
> issue in escr binding (which is pretty mine error), hope to fix it up
> today. Also I hope to eventually implement raw events this weekend
> but better to base the new code on all this stuff merged. This will
> allow to "take a look" on code structure from a high point and find
> potential caveats.
> 
> All-in-one
> 
> Reviewed-by: Cyrill Gorcunov <gorcunov@openvz.org>
> 
> Thanks a huge, Ming!
> 
> > 
> > 	Ingo
> > 
> 	-- Cyrill

Ok, the issue I thought about not really exist. Misfire :)

	-- Cyrill