From: Robert Richter <robert.richter@amd.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>,
Ingo Molnar <mingo@elte.hu>, LKML <linux-kernel@vger.kernel.org>,
Cyrill Gorcunov <gorcunov@gmail.com>
Subject: Re: [PATCH 0/3] perf/core, x86: unify perfctr bitmasks
Date: Tue, 30 Mar 2010 17:59:49 +0200 [thread overview]
Message-ID: <20100330155949.GJ11907@erda.amd.com> (raw)
In-Reply-To: <1269961255.5258.221.camel@laptop>
On 30.03.10 17:00:55, Peter Zijlstra wrote:
> On Tue, 2010-03-30 at 15:53 +0200, Stephane Eranian wrote:
> > > So, there are some ARCH_PERFMON_EVENTSEL_* masks that are Intel only,
> > > which is true for ARCH_PERFMON_EVENTSEL_ANY. And indead, the code
> > > should be checked for this. ARCH_PERFMON_EVENTSEL_ANY is always
> > > cleared on AMD cpus, so this code is ok. Actually the bit is cleared
> >
> > Until AMD uses that bit too and you won't notice this test. This is a security
> > check specific to Intel and it should be in an Intel-specific function.
> >
> > > for *all* cpus in x86_pmu_raw_event(), the code was and is broken for
> > > this.
> > >
> > Yes, needs to be authorized for any perfmon v3 and later revisions.
>
> So how about something like this on top of Robert's patches?
>
> ---
> arch/x86/kernel/cpu/perf_event.c | 16 ++++++----------
> arch/x86/kernel/cpu/perf_event_amd.c | 5 +++--
> arch/x86/kernel/cpu/perf_event_intel.c | 15 ++++++++++++++-
> arch/x86/kernel/cpu/perf_event_p4.c | 5 +++--
> 4 files changed, 26 insertions(+), 15 deletions(-)
>
> Index: linux-2.6/arch/x86/kernel/cpu/perf_event.c
> ===================================================================
> --- linux-2.6.orig/arch/x86/kernel/cpu/perf_event.c
> +++ linux-2.6/arch/x86/kernel/cpu/perf_event.c
> @@ -201,7 +201,7 @@ struct x86_pmu {
> unsigned eventsel;
> unsigned perfctr;
> u64 (*event_map)(int);
> - u64 (*raw_event)(u64);
> + int (*raw_event)(struct perf_event *event);
> int max_events;
> int num_counters;
> int num_counters_fixed;
> @@ -445,9 +445,10 @@ static int x86_hw_config(struct perf_eve
> return 0;
> }
>
> -static u64 x86_pmu_raw_event(u64 hw_event)
> +static int x86_pmu_raw_event(struct perf_event *event)
> {
> - return hw_event & X86_RAW_EVENT_MASK;
> + event->hw.config |= event->attr.config & X86_RAW_EVENT_MASK;
This still clears the ANY bit. See below.
> + return 0;
> }
>
> /*
> @@ -511,13 +512,8 @@ static int __hw_perf_event_init(struct p
> /*
> * Raw hw_event type provide the config in the hw_event structure
> */
> - if (attr->type == PERF_TYPE_RAW) {
> - hwc->config |= x86_pmu.raw_event(attr->config);
> - if ((hwc->config & ARCH_PERFMON_EVENTSEL_ANY) &&
> - perf_paranoid_cpu() && !capable(CAP_SYS_ADMIN))
> - return -EACCES;
> - return 0;
> - }
> + if (attr->type == PERF_TYPE_RAW)
> + return x86_pmu.raw_event(event);
We could go on with this and move this into *_hw_config(), but so far
this change is fine to me. This would then remove .raw_event() at all.
[...]
> Index: linux-2.6/arch/x86/kernel/cpu/perf_event_intel.c
> ===================================================================
> --- linux-2.6.orig/arch/x86/kernel/cpu/perf_event_intel.c
> +++ linux-2.6/arch/x86/kernel/cpu/perf_event_intel.c
> @@ -758,6 +758,19 @@ intel_get_event_constraints(struct cpu_h
> return x86_get_event_constraints(cpuc, event);
> }
>
> +static int intel_pmu_raw_event(struct perf_event *event)
> +{
> + int ret = x86_pmu_raw_event(event);
> + if (ret)
> + return ret;
> +
> + if ((event->hw.config & ARCH_PERFMON_EVENTSEL_ANY) &&
> + perf_paranoid_cpu() && !capable(CAP_SYS_ADMIN))
> + return -EACCES;
> +
> + return 0;
Maybe this?
if (!(event->attr.config & ARCH_PERFMON_EVENTSEL_ANY))
return 0;
if (perf_paranoid_cpu() && !capable(CAP_SYS_ADMIN))
return -EACCES;
event->hw.config |= ARCH_PERFMON_EVENTSEL_ANY;
return 0;
-Robert
--
Advanced Micro Devices, Inc.
Operating System Research Center
email: robert.richter@amd.com
next prev parent reply other threads:[~2010-03-30 16:00 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-03-29 16:36 [PATCH 0/3] perf/core, x86: unify perfctr bitmasks Robert Richter
2010-03-29 16:36 ` [PATCH 1/3] perf/core, x86: undo some some *_counter* -> *_event* renames Robert Richter
2010-04-02 19:09 ` [tip:perf/core] perf, x86: Undo " tip-bot for Robert Richter
2010-03-29 16:36 ` [PATCH 2/3] perf/core, x86: removing p6_pmu_raw_event() Robert Richter
2010-03-29 16:36 ` [PATCH 3/3] perf/core, x86: implement ARCH_PERFMON_EVENTSEL bit masks Robert Richter
2010-03-29 16:48 ` Peter Zijlstra
2010-03-29 17:01 ` Robert Richter
2010-03-30 9:28 ` Robert Richter
2010-04-02 19:09 ` [tip:perf/core] perf, " tip-bot for Robert Richter
2010-03-30 10:11 ` [PATCH 0/3] perf/core, x86: unify perfctr bitmasks Stephane Eranian
2010-03-30 13:41 ` Robert Richter
2010-03-30 13:53 ` Stephane Eranian
2010-03-30 15:00 ` Peter Zijlstra
2010-03-30 15:11 ` Cyrill Gorcunov
2010-03-30 15:31 ` Stephane Eranian
2010-03-30 15:59 ` Robert Richter [this message]
2010-03-30 16:55 ` Peter Zijlstra
2010-03-30 17:11 ` Cyrill Gorcunov
2010-03-30 17:24 ` Robert Richter
2010-03-30 18:29 ` Cyrill Gorcunov
2010-03-30 19:04 ` Peter Zijlstra
2010-03-30 19:18 ` Cyrill Gorcunov
2010-03-31 16:15 ` Cyrill Gorcunov
2010-03-31 16:26 ` Cyrill Gorcunov
2010-03-31 17:05 ` Cyrill Gorcunov
2010-04-01 2:14 ` Lin Ming
2010-04-01 6:47 ` Lin Ming
2010-04-01 10:36 ` Peter Zijlstra
2010-04-02 19:09 ` [tip:perf/core] perf, x86: Fix up the ANY flag stuff tip-bot for Peter Zijlstra
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