From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758237Ab0CaWc3 (ORCPT ); Wed, 31 Mar 2010 18:32:29 -0400 Received: from caramon.arm.linux.org.uk ([78.32.30.218]:43214 "EHLO caramon.arm.linux.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757141Ab0CaWc1 (ORCPT ); Wed, 31 Mar 2010 18:32:27 -0400 Date: Wed, 31 Mar 2010 23:30:40 +0100 From: Russell King To: "H. Peter Anvin" Cc: Christoph Lameter , Matthew Wilcox , Yinghai Lu , Andrew Morton , Rabin Vincent , lkml , penberg@cs.helsinki.fi, Benjamin Herrenschmidt , linux-arch@vger.kernel.org Subject: Re: start_kernel(): bug: interrupts were enabled early Message-ID: <20100331223039.GA8999@flint.arm.linux.org.uk> Mail-Followup-To: "H. Peter Anvin" , Christoph Lameter , Matthew Wilcox , Yinghai Lu , Andrew Morton , Rabin Vincent , lkml , penberg@cs.helsinki.fi, Benjamin Herrenschmidt , linux-arch@vger.kernel.org References: <20100325194100.GA2364@debian> <20100331134048.da4e35a7.akpm@linux-foundation.org> <4BB3B4DB.7040904@kernel.org> <20100331210145.GB32165@parisc-linux.org> <4BB3B8FC.1020608@zytor.com> <20100331211754.GC32165@parisc-linux.org> <20100331215411.GB17715@flint.arm.linux.org.uk> <4BB3C540.9000405@zytor.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4BB3C540.9000405@zytor.com> User-Agent: Mutt/1.5.18 (2008-05-17) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Mar 31, 2010 at 02:57:20PM -0700, H. Peter Anvin wrote: > On 03/31/2010 02:54 PM, Russell King wrote: > > On Wed, Mar 31, 2010 at 04:42:25PM -0500, Christoph Lameter wrote: > >> Do not run the checks while we are in a single threaded context? > >> > >> I thought we had some dynamic code patching thingamy that could change > >> those when we go to smp mode? > > > > You have to remember that on embedded architectures, such as ARM, > > where XIP is supported we can't change the text segment at run time - > > which means dynamic code patching won't work. > > > > However, the kernel should still work in such situations. > > > > The question still remains what the incremental cost is of doing > irqsave/irqrestore. Compared to irq disable/enable, it wouldn't be much higher; saving can be done by a direct register to register move, so that should be relatively cheap. The restore may be a little bit more depending on the CPU arch version, but not significant. So there shouldn't be a problem from ARM POV to switch to using irqsave/irqrestore. -- Russell King Linux kernel 2.6 ARM Linux - http://www.arm.linux.org.uk/ maintainer of: