From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755548Ab0DBW0R (ORCPT ); Fri, 2 Apr 2010 18:26:17 -0400 Received: from caramon.arm.linux.org.uk ([78.32.30.218]:43938 "EHLO caramon.arm.linux.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755238Ab0DBW0M (ORCPT ); Fri, 2 Apr 2010 18:26:12 -0400 Date: Fri, 2 Apr 2010 23:25:16 +0100 From: Russell King - ARM Linux To: Linus Torvalds Cc: Jason Wessel , Will Deacon , Linux Kernel Mailing List , kgdb-bugreport@lists.sourceforge.net, linux-arm@vger.kernel.org Subject: Re: [PATCH 4/5] kgdb: Use atomic operators which use barriers Message-ID: <20100402222516.GA11073@n2100.arm.linux.org.uk> References: <1270233145-29335-1-git-send-email-jason.wessel@windriver.com> <1270233145-29335-2-git-send-email-jason.wessel@windriver.com> <1270233145-29335-3-git-send-email-jason.wessel@windriver.com> <1270233145-29335-4-git-send-email-jason.wessel@windriver.com> <1270233145-29335-5-git-send-email-jason.wessel@windriver.com> <4BB64762.6040806@windriver.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.19 (2009-01-05) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Apr 02, 2010 at 12:43:00PM -0700, Linus Torvalds wrote: > Russell is wrong. Actually, in future threads you end up agreeing with my position... > The fact that maybe some ARM6 cache coherency implementation is pure and > utter sh*t and never sees the changes without the same instruction that > happens to be a memory barrier on that architecture does not make that > cpu_relax() any more about memory barriers. I'm not going to discuss it now; I'm on holiday. Wait until mid-next week on this and I'll respond with a fuller reply.