From: Robert Richter <robert.richter@amd.com>
To: Stephane Eranian <eranian@google.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@elte.hu>, LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 00/12] perf: introduce model specific events and AMD IBS
Date: Wed, 21 Apr 2010 20:26:29 +0200 [thread overview]
Message-ID: <20100421182629.GE6450@erda.amd.com> (raw)
In-Reply-To: <u2kbd4cb8901004210621gd8b453cg6b41f1ee3effaa99@mail.gmail.com>
On 21.04.10 15:21:35, Stephane Eranian wrote:
> Okay, so you're suggesting everything is exposed via PERF_SAMPLE_REGS.
> PEBS does capture machine state which is easily mapped onto PERF_SAMPLE_REGS.
> Well, that's until you look at PEB-LL on Nehalem where is captures
> latencies and data
> addresses.
>
> Those could be funneled through PERF_SAMPLE_REGS
> as well, I believe. But that means, PERF_SAMPLE_REGS would need some
> configuration
> bitmask to name the registers of interest, e.g. EAX, EDX, IBSOP_DATA,
> IBSOP_PHYSAD,
> and so on.
What is the idea of PERF_SAMPLE_REGS? A git grep PERF_SAMPLE_REGS only
returns a single line in -tip. I know nothing about it.
-Robert
--
Advanced Micro Devices, Inc.
Operating System Research Center
email: robert.richter@amd.com
next prev parent reply other threads:[~2010-04-21 18:46 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-04-13 20:23 [PATCH 00/12] perf: introduce model specific events and AMD IBS Robert Richter
2010-04-13 20:23 ` [PATCH 01/12] perf, x86: move perfctr init code to x86_setup_perfctr() Robert Richter
2010-05-07 18:42 ` [tip:perf/core] perf, x86: Move " tip-bot for Robert Richter
2010-04-13 20:23 ` [PATCH 02/12] perf, x86: moving x86_setup_perfctr() Robert Richter
2010-05-07 18:42 ` [tip:perf/core] perf, x86: Move x86_setup_perfctr() tip-bot for Robert Richter
2010-04-13 20:23 ` [PATCH 03/12] perf, x86: call x86_setup_perfctr() from .hw_config() Robert Richter
2010-05-07 18:42 ` [tip:perf/core] perf, x86: Call " tip-bot for Robert Richter
2010-04-13 20:23 ` [PATCH 04/12] perf: introduce flag for model specific events Robert Richter
2010-04-13 20:23 ` [PATCH 05/12] perf, x86: pass enable bit mask to __x86_pmu_enable_event() Robert Richter
2010-05-07 18:43 ` [tip:perf/core] perf, x86: Pass " tip-bot for Robert Richter
2010-04-13 20:23 ` [PATCH 06/12] perf, x86: use weight instead of cmask in for_each_event_constraint() Robert Richter
2010-05-07 18:43 ` [tip:perf/core] perf, x86: Use " tip-bot for Robert Richter
2010-04-13 20:23 ` [PATCH 07/12] perf, x86: introduce bit range for special pmu events Robert Richter
2010-04-13 20:23 ` [PATCH 08/12] perf, x86: modify some code to allow the introduction of ibs events Robert Richter
2010-04-13 20:23 ` [PATCH 09/12] perf, x86: implement IBS feature detection Robert Richter
2010-04-13 20:23 ` [PATCH 10/12] perf, x86: setup NMI handler for IBS Robert Richter
2010-04-15 12:57 ` Peter Zijlstra
2010-04-15 13:11 ` Robert Richter
2010-04-19 16:04 ` Robert Richter
2010-04-13 20:23 ` [PATCH 11/12] perf, x86: implement AMD IBS event configuration Robert Richter
2010-04-19 13:46 ` Stephane Eranian
2010-04-20 10:31 ` Robert Richter
2010-04-20 16:05 ` Robert Richter
2010-04-21 8:47 ` Robert Richter
2010-04-21 9:02 ` Stephane Eranian
2010-04-21 9:21 ` Robert Richter
2010-04-21 10:54 ` Robert Richter
2010-04-21 11:37 ` Stephane Eranian
2010-04-21 16:58 ` Robert Richter
2010-04-22 17:32 ` Stephane Eranian
2010-05-11 13:57 ` Robert Richter
2010-04-13 20:23 ` [PATCH 12/12] perf, x86: implement the ibs interrupt handler Robert Richter
2010-04-19 12:19 ` Stephane Eranian
2010-04-20 13:10 ` Robert Richter
2010-04-22 14:45 ` Robert Richter
2010-05-07 15:28 ` [PATCH] perf: fix raw sample size if no sampling data is attached Robert Richter
2010-05-07 15:41 ` Peter Zijlstra
2010-05-07 19:48 ` Robert Richter
2010-05-18 15:12 ` [RFC PATCH] perf: align raw sample data on 64-bit boundaries Robert Richter
2010-05-19 7:39 ` Frederic Weisbecker
2010-05-19 9:31 ` Robert Richter
2010-05-24 21:25 ` Frederic Weisbecker
2010-05-28 17:35 ` Robert Richter
2010-04-13 20:45 ` [osrc-patches] [PATCH 00/12] perf: introduce model specific events and AMD IBS Robert Richter
2010-04-14 12:31 ` Robert Richter
2010-04-15 7:41 ` Peter Zijlstra
2010-04-15 7:44 ` Peter Zijlstra
2010-04-15 15:16 ` Robert Richter
2010-04-21 12:11 ` Peter Zijlstra
2010-04-21 13:21 ` Stephane Eranian
2010-04-21 18:26 ` Robert Richter [this message]
2010-04-21 18:40 ` Stephane Eranian
2010-04-21 16:28 ` Robert Richter
2010-04-28 16:16 ` [osrc-patches] " Robert Richter
2010-05-04 14:18 ` Peter Zijlstra
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20100421182629.GE6450@erda.amd.com \
--to=robert.richter@amd.com \
--cc=eranian@google.com \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@elte.hu \
--cc=peterz@infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).