From: Anton Vorontsov <cbouatmailru@gmail.com>
To: Greg Kroah-Hartman <gregkh@suse.de>
Cc: Alan Stern <stern@rowland.harvard.edu>,
Mike Frysinger <vapier.adi@gmail.com>,
Michael Hennerich <michael.hennerich@analog.com>,
Sebastian Siewior <bigeasy@linutronix.de>,
Catalin Marinas <catalin.marinas@arm.com>,
Bryan Wu <cooloney@kernel.org>,
linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v2] USB: isp1760: Soften DW3 X/transaction error bit handling
Date: Fri, 7 May 2010 01:09:19 +0400 [thread overview]
Message-ID: <20100506210919.GA28930@oksana.dev.rtsoft.ru> (raw)
In-Reply-To: <Pine.LNX.4.44L0.1005061543421.1708-100000@iolanthe.rowland.org>
There were some reports[1] of isp1760 USB driver malfunctioning
with high speed devices, noticed on Blackfin and PowerPC targets.
These reports indicated that the original Philips 'pehcd'[2]
driver worked fine.
We've noticed the same issue with an ARM RealView platform. This
happens under load (with only some mass storage devices, not all,
just as in another report[3]):
error bit is set in DW3
error bit is set in DW3
error bit is set in DW3
usb 1-1.2: device descriptor read/64, error -32
It appears that the 'pehcd' driver checks the X bit only if the
transaction is halted (H bit), otherwise the error is so far
insignificant.
The ISP176x chips were modeled after EHCI, and EHCI spec says
(thanks to Alan Stern for pointing out):
"Transaction errors cause the status field to be updated to reflect
the type of error, but the transaction continues to be retried until
the Active bit is set to 0. When the error counter reaches 0, the
Halt bit is set and the Active bit is cleared."
So, just as the original Philips driver, isp1760 must report the
error only if the transaction error and the halt bits are set.
[1] http://markmail.org/message/lx4qrlbrs2uhcnly
[2] svn co svn://sources.blackfin.uclinux.org/linux-kernel/trunk/drivers/usb/host -r 5494
See pehci.c:pehci_hcd_update_error_status().
[3] http://blackfin.uclinux.org/gf/tracker/5148
Signed-off-by: Anton Vorontsov <avorontsov@mvista.com>
---
On Thu, May 06, 2010 at 03:53:54PM -0400, Alan Stern wrote:
[...]
> > I didn't find where exactly ISP1760 spec mandates 'H && X'
> > handling (maybe it's in the EHCI spec?),
>
> Yes, it is described implicitly in the EHCI spec, section 4.10.3.
Thanks! I've added this to the commit message.
On Thu, May 06, 2010 at 03:23:28PM -0400, Mike Frysinger wrote:
> On Thu, May 6, 2010 at 15:15, Anton Vorontsov wrote:
> > [3] http://blackfin.uclinux.org/gf/project/uclinux-dist/tracker/?action=TrackerItemEdit&tracker_item_id=5148
>
> i doubt you feel like resending, but this is a better link:
> http://blackfin.uclinux.org/gf/tracker/5148
Yeah. I've changed the link, thanks.
drivers/usb/host/isp1760-hcd.c | 7 +++----
1 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/usb/host/isp1760-hcd.c b/drivers/usb/host/isp1760-hcd.c
index 9f01293..9989c0b 100644
--- a/drivers/usb/host/isp1760-hcd.c
+++ b/drivers/usb/host/isp1760-hcd.c
@@ -713,12 +713,11 @@ static int check_error(struct ptd *ptd)
u32 dw3;
dw3 = le32_to_cpu(ptd->dw3);
- if (dw3 & DW3_HALT_BIT)
+ if (dw3 & DW3_HALT_BIT) {
error = -EPIPE;
- if (dw3 & DW3_ERROR_BIT) {
- printk(KERN_ERR "error bit is set in DW3\n");
- error = -EPIPE;
+ if (dw3 & DW3_ERROR_BIT)
+ pr_err("error bit is set in DW3\n");
}
if (dw3 & DW3_QTD_ACTIVE) {
--
1.7.0.5
next prev parent reply other threads:[~2010-05-06 21:09 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-05-06 19:15 [PATCH] USB: isp1760: Soften DW3 X/transaction error bit handling Anton Vorontsov
2010-05-06 19:23 ` Mike Frysinger
2010-05-06 19:53 ` Alan Stern
2010-05-06 21:09 ` Anton Vorontsov [this message]
2010-05-07 7:59 ` [PATCH v2] " Sebastian Andrzej Siewior
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20100506210919.GA28930@oksana.dev.rtsoft.ru \
--to=cbouatmailru@gmail.com \
--cc=bigeasy@linutronix.de \
--cc=catalin.marinas@arm.com \
--cc=cooloney@kernel.org \
--cc=gregkh@suse.de \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-usb@vger.kernel.org \
--cc=michael.hennerich@analog.com \
--cc=stern@rowland.harvard.edu \
--cc=vapier.adi@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox