From: Cyrill Gorcunov <gorcunov@openvz.org>
To: Ingo Molnar <mingo@elte.hu>
Cc: LKML <linux-kernel@vger.kernel.org>,
"Lin Ming" <ming.m.lin@intel.com>,
"Peter Zijlstra" <peterz@infradead.org>,
"Frédéric Weisbecker" <fweisbec@gmail.com>,
"Cyrill Gorcunov" <gorcunov@openvz.org>,
"Peter Zijlstra" <a.p.zijlstra@chello.nl>
Subject: [patch 3/4] x86,perf: P4 PMU -- add missing bit in CCCR mask
Date: Wed, 19 May 2010 01:19:19 +0400 [thread overview]
Message-ID: <20100518212439.354345151@openvz.org> (raw)
In-Reply-To: 20100518211916.407689068@openvz.org
[-- Attachment #1: x86-perf-p4-cccr-mask-ht-t1 --]
[-- Type: text/plain, Size: 910 bytes --]
Should be there is a sake of RAW events.
Signed-off-by: Cyrill Gorcunov <gorcunov@openvz.org>
CC: Lin Ming <ming.m.lin@intel.com>
CC: Peter Zijlstra <a.p.zijlstra@chello.nl>
CC: Ingo Molnar <mingo@elte.hu>
CC: Frederic Weisbecker <fweisbec@gmail.com>
---
arch/x86/include/asm/perf_event_p4.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
Index: linux-2.6.git/arch/x86/include/asm/perf_event_p4.h
=====================================================================
--- linux-2.6.git.orig/arch/x86/include/asm/perf_event_p4.h
+++ linux-2.6.git/arch/x86/include/asm/perf_event_p4.h
@@ -89,7 +89,8 @@
P4_CCCR_ENABLE)
/* HT mask */
-#define P4_CCCR_MASK_HT (P4_CCCR_MASK | P4_CCCR_THREAD_ANY)
+#define P4_CCCR_MASK_HT \
+ (P4_CCCR_MASK | P4_CCCR_OVF_PMI_T1 | P4_CCCR_THREAD_ANY)
#define P4_GEN_ESCR_EMASK(class, name, bit) \
class##__##name = ((1 << bit) << P4_ESCR_EVENTMASK_SHIFT)
next prev parent reply other threads:[~2010-05-18 21:24 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-05-18 21:19 [patch 0/4] [perf -tip/master] p4 pmu updates Cyrill Gorcunov
2010-05-18 21:19 ` [patch 1/4] x86,perf: P4 PMU -- do a real check for ESCR address being in hash Cyrill Gorcunov
2010-05-19 7:57 ` [tip:perf/core] perf, x86: " tip-bot for Cyrill Gorcunov
2010-05-18 21:19 ` [patch 2/4] x86,perf: p4_pmu_schedule_events -- use smp_processor_id instead of raw_ Cyrill Gorcunov
2010-05-19 7:57 ` [tip:perf/core] perf, x86: P4_pmu_schedule_events " tip-bot for Cyrill Gorcunov
2010-05-18 21:19 ` Cyrill Gorcunov [this message]
2010-05-19 7:57 ` [tip:perf/core] perf, x86: P4 PMU -- add missing bit in CCCR mask tip-bot for Cyrill Gorcunov
2010-05-18 21:19 ` [patch 4/4] x86,perf: P4 PMU -- prepare header for user-space inclusion Cyrill Gorcunov
2010-05-19 7:35 ` Ingo Molnar
2010-05-19 7:41 ` Cyrill Gorcunov
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20100518212439.354345151@openvz.org \
--to=gorcunov@openvz.org \
--cc=a.p.zijlstra@chello.nl \
--cc=fweisbec@gmail.com \
--cc=linux-kernel@vger.kernel.org \
--cc=ming.m.lin@intel.com \
--cc=mingo@elte.hu \
--cc=peterz@infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox