[PATCH -mm 0/6] ARCH_KMALLOC_MINALIGN fixes

[PATCH -mm 0/6] ARCH_KMALLOC_MINALIGN fixes

[FUJITA Tomonori]

As DMA-API-HOWTO says, kmalloc'ed buffer must be DMA-safe. Drivers and
subsystems depend on it.

So architectures that handle DMA-non-coherent memory need to set
ARCH_KMALLOC_MINALIGN: the kmalloc'ed buffer doesn't share a cache
with the others. Otherwise, we hit memory corruption due to DMA.

I had a quick look at all the architectures. Seems that some
architectures that need to set ARCH_KMALLOC_MINALIGN don't do.

=
 arch/blackfin/include/asm/cache.h |    2 ++
 arch/frv/include/asm/cache.h      |    2 ++
 arch/m68k/include/asm/cache.h     |    2 ++
 arch/mn10300/include/asm/cache.h  |    2 ++
 arch/parisc/include/asm/cache.h   |    2 ++
 arch/xtensa/include/asm/cache.h   |    1 +
 6 files changed, 11 insertions(+), 0 deletions(-)

[PATCH -mm 1/6] blackfin: set ARCH_KMALLOC_MINALIGN

[FUJITA Tomonori]

Architectures that handle DMA-non-coherent memory need to set
ARCH_KMALLOC_MINALIGN to make sure that kmalloc'ed buffer is DMA-safe:
the buffer doesn't share a cache with the others.

Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: stable@kernel.org
---
 arch/blackfin/include/asm/cache.h |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/blackfin/include/asm/cache.h b/arch/blackfin/include/asm/cache.h
index 8542bc3..93f6c63 100644
--- a/arch/blackfin/include/asm/cache.h
+++ b/arch/blackfin/include/asm/cache.h
@@ -15,6 +15,8 @@
 #define L1_CACHE_BYTES	(1 << L1_CACHE_SHIFT)
 #define SMP_CACHE_BYTES	L1_CACHE_BYTES
 
+#define ARCH_KMALLOC_MINALIGN	L1_CACHE_BYTES
+
 #ifdef CONFIG_SMP
 #define __cacheline_aligned
 #else
-- 
1.6.5

[PATCH -mm 2/6] frv: set ARCH_KMALLOC_MINALIGN

[FUJITA Tomonori]

Architectures that handle DMA-non-coherent memory need to set
ARCH_KMALLOC_MINALIGN to make sure that kmalloc'ed buffer is DMA-safe:
the buffer doesn't share a cache with the others.

Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Cc: David Howells <dhowells@redhat.com>
Cc: stable@kernel.org
---
 arch/frv/include/asm/cache.h |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/frv/include/asm/cache.h b/arch/frv/include/asm/cache.h
index 2797163..7dc0f0f 100644
--- a/arch/frv/include/asm/cache.h
+++ b/arch/frv/include/asm/cache.h
@@ -17,6 +17,8 @@
 #define L1_CACHE_SHIFT		(CONFIG_FRV_L1_CACHE_SHIFT)
 #define L1_CACHE_BYTES		(1 << L1_CACHE_SHIFT)
 
+#define ARCH_KMALLOC_MINALIGN	L1_CACHE_BYTES
+
 #define __cacheline_aligned	__attribute__((aligned(L1_CACHE_BYTES)))
 #define ____cacheline_aligned	__attribute__((aligned(L1_CACHE_BYTES)))
 
-- 
1.6.5

[PATCH -mm 3/6] m68k: set ARCH_KMALLOC_MINALIGN

[FUJITA Tomonori]

Architectures that handle DMA-non-coherent memory need to set
ARCH_KMALLOC_MINALIGN to make sure that kmalloc'ed buffer is DMA-safe:
the buffer doesn't share a cache with the others.

Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Roman Zippel <zippel@linux-m68k.org>
Cc: stable@kernel.org
---
 arch/m68k/include/asm/cache.h |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/m68k/include/asm/cache.h b/arch/m68k/include/asm/cache.h
index fed3fd3..ecafbe1 100644
--- a/arch/m68k/include/asm/cache.h
+++ b/arch/m68k/include/asm/cache.h
@@ -8,4 +8,6 @@
 #define        L1_CACHE_SHIFT  4
 #define        L1_CACHE_BYTES  (1<< L1_CACHE_SHIFT)
 
+#define ARCH_KMALLOC_MINALIGN	L1_CACHE_BYTES
+
 #endif
-- 
1.6.5

[PATCH -mm 4/6] mn10300: set ARCH_KMALLOC_MINALIGN

[FUJITA Tomonori]

Architectures that handle DMA-non-coherent memory need to set
ARCH_KMALLOC_MINALIGN to make sure that kmalloc'ed buffer is DMA-safe:
the buffer doesn't share a cache with the others.

Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Cc: David Howells <dhowells@redhat.com>
Cc: Koichi Yasutake <yasutake.koichi@jp.panasonic.com>
Cc: stable@kernel.org
---
 arch/mn10300/include/asm/cache.h |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/mn10300/include/asm/cache.h b/arch/mn10300/include/asm/cache.h
index e03cfa2..6e2fe28 100644
--- a/arch/mn10300/include/asm/cache.h
+++ b/arch/mn10300/include/asm/cache.h
@@ -21,6 +21,8 @@
 #define L1_CACHE_DISPARITY	L1_CACHE_NENTRIES * L1_CACHE_BYTES
 #endif
 
+#define ARCH_KMALLOC_MINALIGN	L1_CACHE_BYTES
+
 /* data cache purge registers
  * - read from the register to unconditionally purge that cache line
  * - write address & 0xffffff00 to conditionally purge that cache line
-- 
1.6.5

[PATCH -mm 5/6] parisc: set ARCH_KMALLOC_MINALIGN

[FUJITA Tomonori]

Architectures that handle DMA-non-coherent memory need to set
ARCH_KMALLOC_MINALIGN to make sure that kmalloc'ed buffer is DMA-safe:
the buffer doesn't share a cache with the others.

Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Cc: Kyle McMartin <kyle@mcmartin.ca>
Cc: Helge Deller <deller@gmx.de>
Cc: James E.J. Bottomley <jejb@parisc-linux.org>
Cc: stable@kernel.org
---
 arch/parisc/include/asm/cache.h |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/parisc/include/asm/cache.h b/arch/parisc/include/asm/cache.h
index 45effe6..5d87f27 100644
--- a/arch/parisc/include/asm/cache.h
+++ b/arch/parisc/include/asm/cache.h
@@ -22,6 +22,8 @@
 #define L1_CACHE_SHIFT 5
 #endif
 
+#define ARCH_KMALLOC_MINALIGN	L1_CACHE_BYTES
+
 #ifndef __ASSEMBLY__
 
 #define L1_CACHE_ALIGN(x)       (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
-- 
1.6.5

[PATCH -mm 6/6] xtensa: set ARCH_KMALLOC_MINALIGN

[FUJITA Tomonori]

Architectures that handle DMA-non-coherent memory need to set
ARCH_KMALLOC_MINALIGN to make sure that kmalloc'ed buffer is DMA-safe:
the buffer doesn't share a cache with the others.

Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Cc: Chris Zankel <chris@zankel.net>
Cc: stable@kernel.org
---
 arch/xtensa/include/asm/cache.h |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/xtensa/include/asm/cache.h b/arch/xtensa/include/asm/cache.h
index f04c989..ed8cd3c 100644
--- a/arch/xtensa/include/asm/cache.h
+++ b/arch/xtensa/include/asm/cache.h
@@ -29,5 +29,6 @@
 # define CACHE_WAY_SIZE ICACHE_WAY_SIZE
 #endif
 
+#define ARCH_KMALLOC_MINALIGN	L1_CACHE_BYTES
 
 #endif	/* _XTENSA_CACHE_H */
-- 
1.6.5

Re: [PATCH -mm 0/6] ARCH_KMALLOC_MINALIGN fixes

[Pekka Enberg]

On Thu, May 20, 2010 at 6:21 AM, FUJITA Tomonori
<fujita.tomonori@lab.ntt.co.jp> wrote:
> As DMA-API-HOWTO says, kmalloc'ed buffer must be DMA-safe. Drivers and
> subsystems depend on it.
>
> So architectures that handle DMA-non-coherent memory need to set
> ARCH_KMALLOC_MINALIGN: the kmalloc'ed buffer doesn't share a cache
> with the others. Otherwise, we hit memory corruption due to DMA.
>
> I had a quick look at all the architectures. Seems that some
> architectures that need to set ARCH_KMALLOC_MINALIGN don't do.

Acked-by: Pekka Enberg <penberg@cs.helsinki.fi>

for the whole series.

>
> =
>  arch/blackfin/include/asm/cache.h |    2 ++
>  arch/frv/include/asm/cache.h      |    2 ++
>  arch/m68k/include/asm/cache.h     |    2 ++
>  arch/mn10300/include/asm/cache.h  |    2 ++
>  arch/parisc/include/asm/cache.h   |    2 ++
>  arch/xtensa/include/asm/cache.h   |    1 +
>  6 files changed, 11 insertions(+), 0 deletions(-)
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at  http://www.tux.org/lkml/
>

Re: [PATCH -mm 1/6] blackfin: set ARCH_KMALLOC_MINALIGN

[Mike Frysinger]

On Wed, May 19, 2010 at 23:21, FUJITA Tomonori wrote:
> Architectures that handle DMA-non-coherent memory need to set
> ARCH_KMALLOC_MINALIGN to make sure that kmalloc'ed buffer is DMA-safe:
> the buffer doesn't share a cache with the others.

thanks, ive merged this into my tree and will push for 2.6.35
-mike

Re: [PATCH -mm 5/6] parisc: set ARCH_KMALLOC_MINALIGN

[Kyle McMartin]

On Thu, May 20, 2010 at 12:21:42PM +0900, FUJITA Tomonori wrote:
> Architectures that handle DMA-non-coherent memory need to set
> ARCH_KMALLOC_MINALIGN to make sure that kmalloc'ed buffer is DMA-safe:
> the buffer doesn't share a cache with the others.
> 
> Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
> 

Applied, thanks!

regards, Kyle