From: Borislav Petkov <borislav.petkov@amd.com>
To: Dan Carpenter <error27@gmail.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
<x86@kernel.org>, Dave Jones <davej@redhat.com>,
<linux-kernel@vger.kernel.org>, <kernel-janitors@vger.kernel.org>
Subject: Re: [patch] x86, cacheinfo: dereferences before check
Date: Tue, 1 Jun 2010 10:23:05 +0200 [thread overview]
Message-ID: <20100601082305.GA10650@aftab> (raw)
In-Reply-To: <20100601071126.GF5483@bicker>
From: Dan Carpenter <error27@gmail.com>
Date: Tue, Jun 01, 2010 at 03:11:27AM -0400
> This moves a couple dereferences after the checks in
> show_cache_disable() and store_cache_disable(). These were introduced
> fairly recently in 9350f982e4: "x86, cacheinfo: Reorganize AMD L3 cache
> structure"
Yes, this is correct, thanks. However I have a couple of patches which
rewrite and cleanup this section even more and was waiting for the merge
window to close before sending out. Stay tuned...
--
Regards/Gruss,
Boris.
Operating Systems Research Center
Advanced Micro Devices, Inc.
next prev parent reply other threads:[~2010-06-01 8:23 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-06-01 7:11 [patch] x86, cacheinfo: dereferences before check Dan Carpenter
2010-06-01 8:23 ` Borislav Petkov [this message]
2010-06-02 16:09 ` [PATCH] x86, cacheinfo: Carve out L3 cache slot accessors Borislav Petkov
2010-06-02 16:18 ` [PATCH -v2] " Borislav Petkov
2010-06-10 0:10 ` [tip:x86/cpu] " tip-bot for Borislav Petkov
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