From: Cyrill Gorcunov <gorcunov@gmail.com>
To: Lin Ming <ming.m.lin@intel.com>
Cc: LKML <linux-kernel@vger.kernel.org>,
Frederic Weisbecker <fweisbec@gmail.com>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@elte.hu>
Subject: Re: [PATCH -tip] perf, x86, Pentium4: Add RAW events verification
Date: Fri, 27 Aug 2010 17:53:03 +0400 [thread overview]
Message-ID: <20100827135303.GA5405@lenovo> (raw)
In-Reply-To: <1282886480.12588.17.camel@minggr.sh.intel.com>
On Fri, Aug 27, 2010 at 01:21:20PM +0800, Lin Ming wrote:
> On Thu, 2010-08-26 at 02:23 +0800, Cyrill Gorcunov wrote:
> > Implements verification of
> >
> > - Bits of ESCR EventMask field (meaningful bits in field are hardware
> > predefined and others bits should be set to zero)
> >
> > - INSTR_COMPLETED event (it is available on predefined cpu model only)
> >
> > - Thread shared events (they should be guarded by "perf_event_paranoid"
> > sysctl due to security reason). The side effect of this action is
> > that PERF_COUNT_HW_BUS_CYCLES become a "paranoid" general event.
> >
> > Signed-off-by: Cyrill Gorcunov <gorcunov@openvz.org>
> > CC: Lin Ming <ming.m.lin@intel.com>
> > CC: Frederic Weisbecker <fweisbec@gmail.com>
> > CC: Ingo Molnar <mingo@elte.hu>
> > CC: Peter Zijlstra <peterz@infradead.org>
> > ---
...
> I have tested this patch on a 16cpus Netburst server.
> The predefined hardware/cache events work well.
>
> Thanks,
> Lin Ming
>
Thanks a lot, Ming!
next prev parent reply other threads:[~2010-08-27 13:53 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-08-25 18:23 [PATCH -tip] perf, x86, Pentium4: Add RAW events verification Cyrill Gorcunov
2010-08-27 5:21 ` Lin Ming
2010-08-27 13:53 ` Cyrill Gorcunov [this message]
2010-09-01 9:18 ` [tip:perf/core] " tip-bot for Cyrill Gorcunov
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