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From: Andreas Herrmann <herrmann.der.user@googlemail.com>
To: "H. Peter Anvin" <hpa@zytor.com>, Ingo Molnar <mingo@elte.hu>,
	Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org, Andi Kleen <andi@firstfloor.org>
Subject: [PATCH] x86, amd: Remove needless CPU family check (for L3 cache info)
Date: Thu, 2 Sep 2010 15:37:10 +0200	[thread overview]
Message-ID: <20100902133710.GA5449@loge.amd.com> (raw)

From: Andreas Herrmann <andreas.herrmann3@amd.com>

Old 32-bit AMD CPUs (all w/o L3 cache) should always return 0 for
cpuid_edx(0x80000006).

For unknown reason the 32-bit implementation differed from the 64-bit
implementation. See commit 67cddd947992b02f01ad093ec814738c5827d17c
(i386: Add L3 cache support to AMD CPUID4 emulation).
The current check is the result of the x86 merge.

Cc: Andi Kleen <andi@firstfloor.org>
Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
---
 arch/x86/kernel/cpu/amd.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index fcf9895..a965b53 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -539,7 +539,7 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
 #endif
 
 	if (c->extended_cpuid_level >= 0x80000006) {
-		if ((c->x86 >= 0x0f) && (cpuid_edx(0x80000006) & 0xf000))
+		if (cpuid_edx(0x80000006) & 0xf000)
 			num_cache_leaves = 4;
 		else
 			num_cache_leaves = 3;
-- 
1.6.4.4


             reply	other threads:[~2010-09-02 13:03 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-09-02 13:37 Andreas Herrmann [this message]
2010-09-05 13:05 ` [tip:x86/cpu] x86, AMD: Remove needless CPU family check (for L3 cache info) tip-bot for Andreas Herrmann

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