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Date: Wed, 29 Sep 2010 19:45:28 +0400
From: Cyrill Gorcunov <gorcunov@gmail.com>
To: Stephane Eranian <eranian@google.com>
Cc: Robert Richter <robert.richter@amd.com>,
        "mingo@redhat.com" <mingo@redhat.com>, "hpa@zytor.com" <hpa@zytor.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
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        "peterz@infradead.org" <peterz@infradead.org>,
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        "dzickus@redhat.com" <dzickus@redhat.com>,
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Subject: Re: [tip:perf/urgent] perf, x86: Catch spurious interrupts after
	disabling counters
Message-ID: <20100929154528.GD9440@lenovo>
References: <tip-63e6be6d98e1a2bcdca86872b67052e51ab6afa1@git.kernel.org> <AANLkTimB2gf=2zYCwiKEgozt_Rsa1Cpb6JuLSzmHusFX@mail.gmail.com> <20100929125301.GG13563@erda.amd.com> <20100929125453.GH13563@erda.amd.com> <AANLkTimoE8wAhT+yxXBPnZvTTGrAtDjdaXPBN3Xg28eL@mail.gmail.com> <AANLkTi=WYU2=4Hu7tb+TSrhJw9K9du19_KjMcG3ij=qn@mail.gmail.com> <20100929150140.GK13563@erda.amd.com> <20100929151253.GL13563@erda.amd.com> <20100929152745.GC9440@lenovo> <AANLkTikvYreYiyCbGeG02j+r4dWVLRH7BqeeG9O=VTNN@mail.gmail.com>
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On Wed, Sep 29, 2010 at 05:33:07PM +0200, Stephane Eranian wrote:
> Robert,
> 
> There is something else bothering me with cpuc->running.
> 
> It is not reset outside of the interrupt handler. So what if
> event scheduling shuffles things around and an event is
> moved somewhere else. Don't you need to clear the
> cpuc->running[idx] for the old counter index?
> 
> 

Both bitmasks are set and test with same index though it might
be a bit obscure scheme (we could be clearing this bit in
x86_pmu_stop but it just a wasting cycles).

Btw, since x86 architectural and p4 are using same tests for
running I presume better to have some helper rather then
open coded pile?

Cyrill