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Date: Wed, 29 Sep 2010 18:22:49 +0200
From: Robert Richter <robert.richter@amd.com>
To: Cyrill Gorcunov <gorcunov@gmail.com>
CC: Stephane Eranian <eranian@google.com>,
        "mingo@redhat.com" <mingo@redhat.com>, "hpa@zytor.com" <hpa@zytor.com>,
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Subject: Re: [tip:perf/urgent] perf, x86: Catch spurious interrupts after
 disabling counters
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On 29.09.10 11:27:45, Cyrill Gorcunov wrote:
> On Wed, Sep 29, 2010 at 05:12:53PM +0200, Robert Richter wrote:
> > On 29.09.10 17:01:40, Robert Richter wrote:
> > > Right, I wasn't remembering correctly, it was P6 and core. And yes, P4
> > > requires the fix. Will send a patch for this.
> > 
> > Ok, Cyrill is sending the patch.
> > 
> > Thanks,
> > 
> > -Robert
> >
> 
> Managed to implement it earlier then I thought.
> 
>   Cyrill
> ---
> Subject: [PATCH -tip] perf, x86: Handle in flight IRQs on P4 platform
> 
> Stephane reported we've missed to guard P4 platform
> against spurious in-flight performance IRQs. Fix it.
> 
> [ the patch is a complement to commit 63e6be6d98e1 ]
> 
> Reported-by: Stephane Eranian <eranian@google.com>
> Signed-off-by: Cyrill Gorcunov <gorcunov@openvz.org>
> CC: Robert Richter <robert.richter@amd.com>
> CC: Lin Ming <ming.m.lin@intel.com>
> ---
>  arch/x86/kernel/cpu/perf_event_p4.c |    6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)

The fix looks correct to me.

-Robert

-- 
Advanced Micro Devices, Inc.
Operating System Research Center