Re: [PATCH 2/3] x86/amd-iommu: Work around S3 BIOS bug

Roedel, Joerg
2010-10-01T09:07:11Z

On Thu, Sep 30, 2010 at 04:21:04PM -0400, Matthew Garrett wrote:
> On Thu, Sep 23, 2010 at 04:44:48PM +0200, Joerg Roedel wrote:
> > +static void iommu_apply_quirks(struct amd_iommu *iommu)
> > +{
> > + if (is_rd890_iommu(iommu->dev)) {
> > + pci_write_config_dword(iommu->dev, 0xf0, iommu->cache_cfg[0]);
> > + pci_write_config_dword(iommu->dev, 0xf4, iommu->cache_cfg[1]);
> > + pci_write_config_dword(iommu->dev, 0xf8, iommu->cache_cfg[2]);
> > + pci_write_config_dword(iommu->dev, 0xfc, iommu->cache_cfg[3]);
> > + }
> > +}
> > +
>
> This doesn't look right. 0xf0-0xff are for indexed register access, so
> what you're doing here is just restoring the last of each of those
> registers that the BIOS programmed - and if the BIOS cleared the
> writable flag afterwards, you're not even doing that.

With a half-fixed BIOS (a BIOS which re-enables the IOMMU on resume)
this was the necessary step to make the IOMMU execute commands again. So
it actually fixed the problem I have seen. I agree that its better to
fully restore the indirect register spaces when we workaround the fully
broken BIOSes. When we have this I remove this code, but until then it
fixes the problem.

Joerg

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