[PATCH] intel_idle: PCI quirk to prevent Lenovo Ideapad s10-3 boot hang

[PATCH] intel_idle: PCI quirk to prevent Lenovo Ideapad s10-3 boot hang

[Len Brown]

From: Len Brown <len.brown@intel.com>

When the Lenovo Ideapad S10-3 is booted with HT enabled,
it hits a boot hang in the intel_idle driver.

This occurs when entering ATM-C4 for the first time,
unless BM_STS is first cleared.

acpi_idle doesn't see this because it first checks
and clears BM_STS, but it would hit the same hang
if that check were disabled.

http://bugs.meego.com/show_bug.cgi?id=7093
https://bugs.launchpad.net/ubuntu/+source/linux/+bug/634702

Signed-off-by: Len Brown <len.brown@intel.com>
---
 drivers/pci/quirks.c |   20 ++++++++++++++++++++
 1 files changed, 20 insertions(+), 0 deletions(-)

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 197e38f..a8dbf2e 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -155,6 +155,26 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NEC,	PCI_DEVICE_ID_NEC_CBUS_2,	quirk_isa_d
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NEC,	PCI_DEVICE_ID_NEC_CBUS_3,	quirk_isa_dma_hangs);
 
 /*
+ * Intel NM10 "TigerPoint" LPC PM1a_STS.BM_STS must be clear
+ * for some HT machines to use C4 w/o hanging.
+ */
+static void __devinit quirk_tigerpoint_bm_sts(struct pci_dev *dev)
+{
+	u32 pmbase;
+	u16 pm1a;
+
+	pci_read_config_dword(dev, 0x40, &pmbase);
+	pmbase = pmbase & 0xff80;
+	pm1a = inw(pmbase);
+
+	if (pm1a & 0x10) {
+		dev_info(&dev->dev, FW_BUG "TigerPoint LPC.BM_STS cleared\n");
+		outw(0x10, pmbase);
+	}
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TGP_LPC, quirk_tigerpoint_bm_sts);
+
+/*
  *	Chipsets where PCI->PCI transfers vanish or hang
  */
 static void __devinit quirk_nopcipci(struct pci_dev *dev)
-- 
1.7.3

Re: [PATCH] intel_idle: PCI quirk to prevent Lenovo Ideapad s10-3 boot hang

[Matthew Garrett]

On Fri, Sep 24, 2010 at 09:26:31PM -0400, Len Brown wrote:
> From: Len Brown <len.brown@intel.com>
> 
> When the Lenovo Ideapad S10-3 is booted with HT enabled,
> it hits a boot hang in the intel_idle driver.
> 
> This occurs when entering ATM-C4 for the first time,
> unless BM_STS is first cleared.
> 
> acpi_idle doesn't see this because it first checks
> and clears BM_STS, but it would hit the same hang
> if that check were disabled.

If there's hardware that expects BM_STS to be cleared, and if we've 
previously always cleared BM_STS, shouldn't intel_idle be doing the same 
thing?

-- 
Matthew Garrett | mjg59@srcf.ucam.org

Re: [PATCH] intel_idle: PCI quirk to prevent Lenovo Ideapad s10-3 boot hang

[Len Brown]

> > When the Lenovo Ideapad S10-3 is booted with HT enabled,
> > it hits a boot hang in the intel_idle driver.
> > 
> > This occurs when entering ATM-C4 for the first time,
> > unless BM_STS is first cleared.
> > 
> > acpi_idle doesn't see this because it first checks
> > and clears BM_STS, but it would hit the same hang
> > if that check were disabled.
> 
> If there's hardware that expects BM_STS to be cleared, and if we've 
> previously always cleared BM_STS, shouldn't intel_idle be doing the same 
> thing?

No, we don't always clear BM_STS with acpi_idle --
we check (and clear) that bit only if the acpi tables
tell us to do so.

BM_STS is a status bit, not a control bit.
It is a surprise that the NM10 chip-set requires that it be cleared --
apparently once at boot time.

No, I don't want intel_idle to know about this chip-set quirk,
and I don't want to add an IO access to the idle hot path
if we can possibly avoid it.

thanks,
Len Brown, Intel Open Source Technology Center

Re: [PATCH] intel_idle: PCI quirk to prevent Lenovo Ideapad s10-3 boot hang

[Matthew Garrett]

On Thu, Sep 30, 2010 at 06:14:35PM -0400, Len Brown wrote:

> we check (and clear) that bit only if the acpi tables
> tell us to do so.

Do the tables tell us to do so on this platform?

-- 
Matthew Garrett | mjg59@srcf.ucam.org

Re: [PATCH] intel_idle: PCI quirk to prevent Lenovo Ideapad s10-3 boot hang

[Len Brown]

> > we check (and clear) that bit only if the acpi tables
> > tell us to do so.
> 
> Do the tables tell us to do so on this platform?

In this configuration, yes, otherwise acpi_idle
would have failed in exactly the same way.

-Len Brown, Intel Open Source Technology Center

Re: [PATCH] intel_idle: PCI quirk to prevent Lenovo Ideapad s10-3 boot hang

[Matthew Garrett]

On Tue, Oct 05, 2010 at 01:06:15AM -0400, Len Brown wrote:
> > > we check (and clear) that bit only if the acpi tables
> > > tell us to do so.
> > 
> > Do the tables tell us to do so on this platform?
> 
> In this configuration, yes, otherwise acpi_idle
> would have failed in exactly the same way.

So why is intel_idle not paying attention to what the platform is 
requesting?

-- 
Matthew Garrett | mjg59@srcf.ucam.org

Re: [PATCH] intel_idle: PCI quirk to prevent Lenovo Ideapad s10-3 boot hang

[Len Brown]

> > > > we check (and clear) that bit only if the acpi tables
> > > > tell us to do so.
> > > 
> > > Do the tables tell us to do so on this platform?
> > 
> > In this configuration, yes, otherwise acpi_idle
> > would have failed in exactly the same way.
> 
> So why is intel_idle not paying attention to what the platform is 
> requesting?

ACPI's BM_STS mechanism is obsolete, and is fundmentally
incompatible with a tickless OS.  The status bit is a NO-OP
on most modern chip-sets under normal conditions.
However, even when not a NO-OP, it is supposed to
be just an indicator and clearing it should have
no functional effect on the hardware except to
re-arm the hardware that looks for BM_STS.

Clearing BM_STS on the NM10 chipset at boot-time to
make the system boot has nothing to do with
"what the platform is requesting".
It is a workaround for a platform bug that is randomly
masked by how the behaviour of the legacy ACPI OS.

intel_idle it knows nothing about ACPI, and it never will.

thanks,
Len Brown, Intel Open Source Technology Center