From: Robert Richter <robert.richter@amd.com>
To: Ingo Molnar <mingo@elte.hu>
Cc: "Rosenfeld, Hans" <Hans.Rosenfeld@amd.com>,
"Thomas Gleixner" <tglx@linutronix.de>,
LKML <linux-kernel@vger.kernel.org>,
"H. Peter Anvin" <hpa@zytor.com>,
"Herrmann3, Andreas" <Andreas.Herrmann3@amd.com>,
"Peter Zijlstra" <peterz@infradead.org>,
"Peter Zijlstra" <a.p.zijlstra@chello.nl>,
"Frédéric Weisbecker" <fweisbec@gmail.com>,
"Steven Rostedt" <rostedt@goodmis.org>,
"Arnaldo Carvalho de Melo" <acme@redhat.com>,
"Stephane Eranian" <eranian@googlemail.com>
Subject: Re: [RFC 0/3] Basic support for LWP
Date: Wed, 6 Oct 2010 09:35:58 +0200 [thread overview]
Message-ID: <20101006073558.GJ13563@erda.amd.com> (raw)
In-Reply-To: <20101005190501.GA21916@elte.hu>
On 05.10.10 15:05:01, Ingo Molnar wrote:
> So thoughts need to be made what the point of it all is and how it
> integrates into perf. If it doesnt integrate, if the whole plan is to
> just get it to user-space where it can be messed up freely in some CPU
> specific way then color me thoroughly uninterested. We have a generic
> instrumentation framework for a reason.
I was looking at how this integrates into the perf syscall. It might
be a little disappointing, but there is not much to do for the kernel.
Ring buffer handling is implemented in hardware now, the user land
sets up address ranges in the task's address space for buffers and
thus may direct access it. We do not need an interrupt handler to fill
the buffers. The pmu state is saved and restored during context
switches in ways that has been proven for the fpu (xsave) and
virtualization (VMCB like LWPCB). So, overall hardware is now doing
the job for writing samples into a userland buffer and managing the
pmu state. This reduces system overhead while profiling a lot
especially because we don't have to walk through a software stack with
each sample (this is where the 'lightweight' comes from).
Of course this does not fit into current frameworks because of its
difference in concept, but in general we want to see it in perf. So
the main work of integration will leave here to tool and library
implementation. But for this Linux must implement LWP context switch
support. This is what Hans did.
We also measured the system impact which comes from the additional
rdmsrl() if the cpu supports LWP. There is no significant performance
decrease in a worst case scenario. So, this is how we think it is the
best to implement it and we need your feedback here.
I think we should consider to apply patch 1/3 as it is unrelated to
LWP and reworks and improves the code.
Thanks,
-Robert
--
Advanced Micro Devices, Inc.
Operating System Research Center
next prev parent reply other threads:[~2010-10-06 7:36 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1286212172-654419-1-git-send-email-hans.rosenfeld@amd.com>
2010-10-04 22:13 ` [RFC 0/3] Basic support for LWP Thomas Gleixner
2010-10-05 14:51 ` Hans Rosenfeld
2010-10-05 15:34 ` Thomas Gleixner
2010-10-05 18:27 ` Hans Rosenfeld
2010-10-05 18:30 ` Hans Rosenfeld
2010-10-05 18:30 ` [RFC 1/3] Cleanup xsave/xrstor support Hans Rosenfeld
2010-10-05 18:30 ` [RFC 2/3] Allow saving of individual states in fpu_xsave() Hans Rosenfeld
2010-10-05 18:30 ` [RFC 3/3] Save/restore LWP state in context switches Hans Rosenfeld
2010-10-06 11:12 ` Brian Gerst
2010-10-07 14:58 ` Hans Rosenfeld
2010-11-23 20:41 ` [RFC 0/2] FPU/xsave rework in preparation for LWP Hans Rosenfeld
2010-11-23 20:41 ` [RFC 1/2] x86, xsave: cleanup xsave/xrstor support Hans Rosenfeld
2010-11-23 20:41 ` [RFC 2/2] x86, xsave: rework xsave support Hans Rosenfeld
2010-11-25 0:36 ` Brian Gerst
2010-10-05 19:05 ` [RFC 0/3] Basic support for LWP Ingo Molnar
2010-10-06 7:35 ` Robert Richter [this message]
[not found] ` <AANLkTi=T0QmcKeZcgcR+GKk-9OwQUB_x8XdHiNuU7tE_@mail.gmail.com>
2010-10-07 10:46 ` Stephane Eranian
2010-10-07 13:59 ` H. Peter Anvin
2010-10-07 14:11 ` Stephane Eranian
2010-10-07 14:20 ` Hans Rosenfeld
2010-10-07 14:20 ` H. Peter Anvin
2010-10-07 14:25 ` Stephane Eranian
2010-10-07 14:47 ` H. Peter Anvin
2010-10-07 15:12 ` Stephane Eranian
2010-10-05 18:43 ` Davidlohr Bueso
2010-10-06 10:26 ` Andi Kleen
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