Re: edac_core: crashes on shutdown

Borislav Petkov
2010-12-03T11:58:59Z

On Thu, Dec 02, 2010 at 05:34:14PM -0500, Tobias Karnat wrote:
> I thought as you wrote later, that this would be an option to use an
> interrupt instead of polling for edac in general.
>
> But as far as I understand this, it is used for PCI bus errors?

Yep, reportedly, memory parity errors can be reported through an NMI.
However, I don't know whether all chipset vendors still do that since
this is legacy and all.

> And should be replaced for detection of PCI SERR and/or PCIE AER,
> are these the same as PCI bus errors?

Yep, this all pertains to PCI/PCIe error reporting but don't
ask me about specifics. You might get some more info from
http://lwn.net/Articles/193468/ - it is not in the current kernel
sources though. Also, EDAC has a generic polling routine for PCI errors,
see <drivers/edac/edac_pci_sysfs.c:edac_pci_dev_parity_test()>

> > And yes, using some kind of an interrupt is much better than polling but
> > I don't know whether there's a single interrupt source for the error
> > types all edac drivers can decode and report. In the amd64_edac case,
> > we're piggybacking on MCE, for example. This was actually the initial
> > reason for 00740c58541b6087d78418cebca1fcb86dc6077d and dropping polling
> > from that driver.
>
> From Intel Architectures Software Developer's Manual Part 3A:
>
> "Starting with 45nm Intel 64 processor with CPUID signature
> DisplayFamily_DisplayModel encoding of 06H_1AH (...), the processor can
> report information on corrected machine-check errors and deliver a
> programmable interrupt for software to respond to MC errors, referred to
> as corrected machine-check error interrupt (CMCI)."
>
> Seems to be unlikely for me on an Intel 975X Mainboard.

Hmm, I don't know, let's ask the driver author :)

Arvind?

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Boris.

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