From: Jack Steiner <steiner@sgi.com>
To: mingo@elte.hu, tglx@linutronix.de, hpa@zytor.co
Cc: linux-kernel@vger.kernel.org
Subject: [PATCH] x86, UV: Fix APICID shift for westmere processors
Date: Mon, 10 Jan 2011 13:52:11 -0600 [thread overview]
Message-ID: <20110110195210.GA18737@sgi.com> (raw)
Westmere processors use a different algorithm for
assigning APICIDs on SGI UV systems. The location of the
node number within the apicid is now a function of the
processor type.
Signed-off-by: Jack Steiner <steiner@sgi.com>
---
arch/x86/kernel/apic/x2apic_uv_x.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Index: linux/arch/x86/kernel/apic/x2apic_uv_x.c
===================================================================
--- linux.orig/arch/x86/kernel/apic/x2apic_uv_x.c 2010-12-31 10:53:26.878105424 -0600
+++ linux/arch/x86/kernel/apic/x2apic_uv_x.c 2010-12-31 10:54:45.291099878 -0600
@@ -378,7 +378,7 @@ struct apic __refdata apic_x2apic_uv_x =
static __cpuinit void set_x2apic_extra_bits(int pnode)
{
- __get_cpu_var(x2apic_extra_bits) = (pnode << 6);
+ __get_cpu_var(x2apic_extra_bits) = (pnode << uvh_apicid.s.pnode_shift);
}
/*
next reply other threads:[~2011-01-10 19:52 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-01-10 19:52 Jack Steiner [this message]
2011-01-11 12:28 ` [tip:x86/urgent] x86, UV: Fix APICID shift for Westmere processors tip-bot for Jack Steiner
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