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From: Andrew Morton <akpm@linux-foundation.org>
To: Hans Rosenfeld <hans.rosenfeld@amd.com>
Cc: <hpa@zytor.com>, <tglx@linutronix.de>, <mingo@elte.hu>,
	<andreas.herrmann3@amd.com>, <linux-kernel@vger.kernel.org>,
	<x86@kernel.org>
Subject: Re: [PATCH 1/4] x86, amd: Normalize compute unit IDs on multi-node processors
Date: Fri, 4 Feb 2011 14:07:44 -0800	[thread overview]
Message-ID: <20110204140744.e2c04ef4.akpm@linux-foundation.org> (raw)
In-Reply-To: <1295881543-572552-2-git-send-email-hans.rosenfeld@amd.com>

On Mon, 24 Jan 2011 16:05:40 +0100
Hans Rosenfeld <hans.rosenfeld@amd.com> wrote:

> From: Andreas Herrmann <andreas.herrmann3@amd.com>
> 
> On multi-node CPUs we don't need the socket wide compute unit ID but
> the node-wide compute unit ID. Thus we need to normalize the value.
> This is similar to what we do with cpu_core_id.
> 
> A compute unit is then identified by physical_package_id, node_id, and
> compute_unit_id.
> 
> ...
>
> --- a/arch/x86/kernel/cpu/amd.c
> +++ b/arch/x86/kernel/cpu/amd.c
> @@ -261,7 +261,7 @@ static int __cpuinit nearby_node(int apicid)
>  #ifdef CONFIG_X86_HT
>  static void __cpuinit amd_get_topology(struct cpuinfo_x86 *c)
>  {
> -	u32 nodes;
> +	u32 nodes, cores_per_cu;
>  	u8 node_id;
>  	int cpu = smp_processor_id();
>  
> @@ -276,6 +276,7 @@ static void __cpuinit amd_get_topology(struct cpuinfo_x86 *c)
>  		/* get compute unit information */
>  		smp_num_siblings = ((ebx >> 8) & 3) + 1;
>  		c->compute_unit_id = ebx & 0xff;
> +		cores_per_cu = ((ebx >> 8) & 3) + 1;
>  	} else if (cpu_has(c, X86_FEATURE_NODEID_MSR)) {
>  		u64 value;
>  
> @@ -288,15 +289,18 @@ static void __cpuinit amd_get_topology(struct cpuinfo_x86 *c)
>  	/* fixup multi-node processor information */
>  	if (nodes > 1) {
>  		u32 cores_per_node;
> +		u32 cus_per_node;
>  
>  		set_cpu_cap(c, X86_FEATURE_AMD_DCM);
>  		cores_per_node = c->x86_max_cores / nodes;
> +		cus_per_node = cores_per_node / cores_per_cu;
>  
>  		/* store NodeID, use llc_shared_map to store sibling info */
>  		per_cpu(cpu_llc_id, cpu) = node_id;
>  
>  		/* core id to be in range from 0 to (cores_per_node - 1) */
> -		c->cpu_core_id = c->cpu_core_id % cores_per_node;
> +		c->cpu_core_id %= cores_per_node;
> +		c->compute_unit_id %= cus_per_node;
>  	}
>  }
>  #endif

arch/x86/kernel/cpu/amd.c: In function 'init_amd':
arch/x86/kernel/cpu/amd.c:268: warning: 'cores_per_cu' may be used uninitialized in this function

The code looks buggy to me.

  parent reply	other threads:[~2011-02-04 22:08 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-01-24 15:05 [PATCH 0/4] x86, amd: family 0x15 L3 cache features Hans Rosenfeld
2011-01-24 15:05 ` [PATCH 1/4] x86, amd: Normalize compute unit IDs on multi-node processors Hans Rosenfeld
2011-01-26 10:57   ` [tip:x86/amd-nb] " tip-bot for Andreas Herrmann
2011-02-14 14:30     ` Ingo Molnar
2011-02-14 17:14       ` [PATCH] x86, amd: Fix uninitialized variable warning Borislav Petkov
2011-02-15  3:10         ` [tip:x86/amd-nb] x86, amd: Initialize variable properly tip-bot for Borislav Petkov
2011-02-04 22:07   ` Andrew Morton [this message]
2011-01-24 15:05 ` [PATCH 2/4] x86, amd: Enable L3 cache index disable on family 0x15 Hans Rosenfeld
2011-01-26 10:58   ` [tip:x86/amd-nb] " tip-bot for Hans Rosenfeld
2011-01-24 15:05 ` [PATCH 3/4] x86, amd: Extend AMD northbridge caching code to support "Link Control" devices Hans Rosenfeld
2011-01-26 10:58   ` [tip:x86/amd-nb] " tip-bot for Hans Rosenfeld
2011-01-24 15:05 ` [PATCH 4/4] x86, amd: Support L3 Cache Partitioning on AMD family 0x15 CPUs Hans Rosenfeld
2011-01-26 10:56   ` Ingo Molnar
2011-01-26 17:05     ` Hans Rosenfeld
2011-01-26 17:08     ` Hans Rosenfeld
2011-01-26 20:56       ` Ingo Molnar
2011-01-27 11:50         ` Hans Rosenfeld
2011-01-27 12:47           ` Ingo Molnar
2011-02-01 15:14             ` Hans Rosenfeld
2011-02-07 17:10             ` Hans Rosenfeld
2011-02-08 12:03               ` [tip:x86/amd-nb] " tip-bot for Hans Rosenfeld
  -- strict thread matches above, loose matches on Subject: below --
2010-12-20 17:13 [PATCH 0/4] x86, amd: family 0x15 L3 cache features Hans Rosenfeld
2010-12-20 17:13 ` [PATCH 1/4] x86, amd: Normalize compute unit IDs on multi-node processors Hans Rosenfeld

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