Re: [PATCH] perf events, x86: Add SandyBridge stalled-cycles-frontend/backend events

[Ingo Molnar <mingo@elte.hu>]

* Lin Ming <ming.m.lin@intel.com> wrote:

> Extend the Intel SandyBridge PMU driver with definitions
> for generic front-end and back-end stall events.
> 
> ( As commit 3011203 says, these are only approximations. )
> 
> Signed-off-by: Lin Ming <ming.m.lin@intel.com>
> ---
>  arch/x86/kernel/cpu/perf_event_intel.c |    6 ++++++
>  1 files changed, 6 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
> index c1ec7a5..61cbf48 100644
> --- a/arch/x86/kernel/cpu/perf_event_intel.c
> +++ b/arch/x86/kernel/cpu/perf_event_intel.c
> @@ -1485,6 +1485,12 @@ static __init int intel_pmu_init(void)
>  
>  		x86_pmu.event_constraints = intel_snb_event_constraints;
>  		x86_pmu.pebs_constraints = intel_snb_pebs_events;
> +
> +		/* UOPS_ISSUED.ANY,c=1,i=1 to count stall cycles */
> +		intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x180010e;
> +		/* UOPS_DISPATCHED.THREAD,c=1,i=1 to count stall cycles*/
> +		intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = 0x18001b1;
> +

Nice!

Could you check Intel Atom perhaps as well, does it have any useful event to 
approximate this?

Thanks,

	Ingo