From: Dimitri Sivanich <sivanich@sgi.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: linux-kernel@vger.kernel.org
Subject: [PATCH] x86: poll waiting for I/OAT DMA channel status
Date: Fri, 6 May 2011 10:33:44 -0500 [thread overview]
Message-ID: <20110506153344.GA16977@sgi.com> (raw)
For certain system configurations a 5 usec udelay before checking I/OAT DMA
channel status is sometimes not sufficient, resulting in a false failure
status and unnecessary freeing of channel resources. Conversely, for many
configurations 5 usec is longer than necessary.
Loop for up to 20 usec waiting for successful status before failing.
Signed-off-by: Dimitri Sivanich <sivanich@sgi.com>
___
drivers/dma/ioat/dma_v2.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
Index: linux/drivers/dma/ioat/dma_v2.c
===================================================================
--- linux.orig/drivers/dma/ioat/dma_v2.c
+++ linux/drivers/dma/ioat/dma_v2.c
@@ -507,6 +507,7 @@ int ioat2_alloc_chan_resources(struct dm
struct ioat_ring_ent **ring;
u64 status;
int order;
+ int i = 0;
/* have we already been set up? */
if (ioat->ring)
@@ -547,8 +548,11 @@ int ioat2_alloc_chan_resources(struct dm
ioat2_start_null_desc(ioat);
/* check that we got off the ground */
- udelay(5);
- status = ioat_chansts(chan);
+ do {
+ udelay(1);
+ status = ioat_chansts(chan);
+ } while (i++ < 20 && !is_ioat_active(status) && !is_ioat_idle(status));
+
if (is_ioat_active(status) || is_ioat_idle(status)) {
set_bit(IOAT_RUN, &chan->state);
return 1 << ioat->alloc_order;
next reply other threads:[~2011-05-06 15:33 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-05-06 15:33 Dimitri Sivanich [this message]
2011-05-26 1:30 ` [PATCH] x86: poll waiting for I/OAT DMA channel status Dan Williams
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