From: Borislav Petkov <bp@amd64.org>
To: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"x86@kernel.org" <x86@kernel.org>, Ingo Molnar <mingo@elte.hu>,
Thomas Gleixner <tglx@linutronix.de>,
"H. Peter Anvin" <hpa@zytor.com>,
"Luck, Tony" <tony.luck@intel.com>
Subject: Re: [PATCH 2/8] x86, mce: remove redundant mce_available() checks
Date: Mon, 20 Jun 2011 09:44:52 +0200 [thread overview]
Message-ID: <20110620074451.GD9070@aftab> (raw)
In-Reply-To: <4DFED0FD.6060701@jp.fujitsu.com>
On Mon, Jun 20, 2011 at 12:47:57AM -0400, Hidetoshi Seto wrote:
> > I don't think this will ever happen so why complicate the code
> > needlessly? This can only be executed if at least one of the cores on
> > the system has CPUID(1)_EDX, bits 7 and 14 cleared and that's just
> > silly.
>
> This is a guard against such silly situation, isn't it?
> I don't think it looks so complicated and needless.
>
> I think this code will not run on systems with single socket as
> long as the processor vendors are in the right mind.
> But in cases when it is numa with strange nodes or when it is
> migrated to/from misconfigured virtual machine I can't say that
> with certainty.
Let me put it this way: are you talking about a concrete example where
there's machine with the BSP's MCA features enabled and the rest of the
cores are not or is this some theoretical thing you're conjecturing?
If it is the first I'd really like to know about it, if it's the second,
then my initial point stands - no need to handle purely theoretical
cases.
--
Regards/Gruss,
Boris.
Advanced Micro Devices GmbH
Einsteinring 24, 85609 Dornach
GM: Alberto Bozzo
Reg: Dornach, Landkreis Muenchen
HRB Nr. 43632 WEEE Registernr: 129 19551
next prev parent reply other threads:[~2011-06-20 7:45 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-06-17 8:37 [PATCH 0/8] x86, mce: misc fix/cleanups, cont Hidetoshi Seto
2011-06-17 8:40 ` [PATCH 1/8] x86, mce: stop calling del_timer_sync() from interrupt Hidetoshi Seto
2011-06-17 13:56 ` Borislav Petkov
2011-06-20 4:46 ` Hidetoshi Seto
2011-06-20 7:36 ` Borislav Petkov
2011-08-26 10:50 ` Borislav Petkov
2011-06-17 8:42 ` [PATCH 2/8] x86, mce: remove redundant mce_available() checks Hidetoshi Seto
2011-06-17 14:39 ` Borislav Petkov
2011-06-20 4:47 ` Hidetoshi Seto
2011-06-20 7:44 ` Borislav Petkov [this message]
2011-06-17 8:43 ` [PATCH 3/8] x86, mce: introduce mce_timer_add() Hidetoshi Seto
2011-06-17 15:11 ` Borislav Petkov
2011-06-17 8:44 ` [PATCH 4/8] x86, mce: rename bootparam parser Hidetoshi Seto
2011-06-17 15:41 ` Borislav Petkov
2011-06-17 22:25 ` Luck, Tony
2011-06-18 8:38 ` Borislav Petkov
2011-06-20 4:48 ` Hidetoshi Seto
2011-06-17 8:45 ` [PATCH 5/8] x86, mce: introduce mce_sysdev_init() Hidetoshi Seto
2011-06-17 16:32 ` Borislav Petkov
2011-06-20 4:48 ` Hidetoshi Seto
2011-06-17 8:46 ` [PATCH 6/8] x86, mce: introduce mce_memory_failure_process() Hidetoshi Seto
2011-06-17 16:59 ` Borislav Petkov
2011-06-17 8:49 ` [PATCH 7/8] x86, mce: rework use of TIF_MCE_NOTIFY Hidetoshi Seto
2011-06-17 8:50 ` [PATCH 8/8] x86, mce, edac: call edac_mce_parse() once per a record Hidetoshi Seto
2011-06-17 17:10 ` Borislav Petkov
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