From: cpw@sgi.com
To: linux-kernel@vger.kernel.org
Cc: mingo@elte.hu, x86@kernel.org, penberg@kernel.org
Subject: [patch 2/8 v5] x86, UV: inline header file functions
Date: Tue, 21 Jun 2011 07:21:27 -0500 [thread overview]
Message-ID: <20110621122242.230529678@sgi.com> (raw)
In-Reply-To: 20110621122125.688884227@sgi.com
[-- Attachment #1: tlb_uv_inlineheaderfuncs --]
[-- Type: text/plain, Size: 3495 bytes --]
Make all the functions in uv_bau.h inline so that it can
be included in the fake prom (used in simulations).
Signed-off-by: Cliff Wickman <cpw@sgi.com>
Reviewed-by: Pekka Enberg <penberg@kernel.org>
---
If not inlined the unused functions will generate compiler warnings.
arch/x86/include/asm/uv/uv_bau.h | 28 ++++++++++++++--------------
1 file changed, 14 insertions(+), 14 deletions(-)
Index: linux/arch/x86/include/asm/uv/uv_bau.h
===================================================================
--- linux.orig/arch/x86/include/asm/uv/uv_bau.h
+++ linux/arch/x86/include/asm/uv/uv_bau.h
@@ -526,72 +526,72 @@ struct bau_control {
struct hub_and_pnode *thp;
};
-static unsigned long read_mmr_uv2_status(void)
+static inline unsigned long read_mmr_uv2_status(void)
{
return read_lmmr(UV2H_LB_BAU_SB_ACTIVATION_STATUS_2);
}
-static void write_mmr_data_broadcast(int pnode, unsigned long mmr_image)
+static inline void write_mmr_data_broadcast(int pnode, unsigned long mmr_image)
{
write_gmmr(pnode, UVH_BAU_DATA_BROADCAST, mmr_image);
}
-static void write_mmr_descriptor_base(int pnode, unsigned long mmr_image)
+static inline void write_mmr_descriptor_base(int pnode, unsigned long mmr_image)
{
write_gmmr(pnode, UVH_LB_BAU_SB_DESCRIPTOR_BASE, mmr_image);
}
-static void write_mmr_activation(unsigned long index)
+static inline void write_mmr_activation(unsigned long index)
{
write_lmmr(UVH_LB_BAU_SB_ACTIVATION_CONTROL, index);
}
-static void write_gmmr_activation(int pnode, unsigned long mmr_image)
+static inline void write_gmmr_activation(int pnode, unsigned long mmr_image)
{
write_gmmr(pnode, UVH_LB_BAU_SB_ACTIVATION_CONTROL, mmr_image);
}
-static void write_mmr_payload_first(int pnode, unsigned long mmr_image)
+static inline void write_mmr_payload_first(int pnode, unsigned long mmr_image)
{
write_gmmr(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST, mmr_image);
}
-static void write_mmr_payload_tail(int pnode, unsigned long mmr_image)
+static inline void write_mmr_payload_tail(int pnode, unsigned long mmr_image)
{
write_gmmr(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL, mmr_image);
}
-static void write_mmr_payload_last(int pnode, unsigned long mmr_image)
+static inline void write_mmr_payload_last(int pnode, unsigned long mmr_image)
{
write_gmmr(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST, mmr_image);
}
-static void write_mmr_misc_control(int pnode, unsigned long mmr_image)
+static inline void write_mmr_misc_control(int pnode, unsigned long mmr_image)
{
write_gmmr(pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
}
-static unsigned long read_mmr_misc_control(int pnode)
+static inline unsigned long read_mmr_misc_control(int pnode)
{
return read_gmmr(pnode, UVH_LB_BAU_MISC_CONTROL);
}
-static void write_mmr_sw_ack(unsigned long mr)
+static inline void write_mmr_sw_ack(unsigned long mr)
{
uv_write_local_mmr(UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS, mr);
}
-static unsigned long read_mmr_sw_ack(void)
+static inline unsigned long read_mmr_sw_ack(void)
{
return read_lmmr(UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE);
}
-static unsigned long read_gmmr_sw_ack(int pnode)
+static inline unsigned long read_gmmr_sw_ack(int pnode)
{
return read_gmmr(pnode, UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE);
}
-static void write_mmr_data_config(int pnode, unsigned long mr)
+static inline void write_mmr_data_config(int pnode, unsigned long mr)
{
uv_write_global_mmr64(pnode, UVH_BAU_DATA_CONFIG, mr);
}
next prev parent reply other threads:[~2011-06-21 12:23 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-06-21 12:21 [patch 0/8 v5] Subject: x86, UV: fixes to tlb shootdown cpw
2011-06-21 12:21 ` [patch 1/8 v5] x86, UV: smp_processor_id in a preemptable region cpw
2011-06-21 15:16 ` [tip:x86/uv] x86, UV: Fix smp_processor_id() use " tip-bot for cpw@sgi.com
2011-06-21 12:21 ` cpw [this message]
2011-06-21 15:16 ` [tip:x86/uv] x86, UV: Inline header file functions tip-bot for cpw@sgi.com
2011-06-21 12:21 ` [patch 3/8 v5] x86, UV: allow for non-consecutive sockets cpw
2011-06-21 15:17 ` [tip:x86/uv] x86, UV: Allow " tip-bot for cpw@sgi.com
2011-06-21 12:21 ` [patch 4/8 v5] x86, UV: correct reset_with_ipi() cpw
2011-06-21 15:17 ` [tip:x86/uv] x86, UV: Correct reset_with_ipi() tip-bot for cpw@sgi.com
2011-06-21 12:21 ` [patch 5/8 v5] x86, UV: rename hubmask to pnmask cpw
2011-06-21 15:18 ` [tip:x86/uv] x86, UV: Rename " tip-bot for cpw@sgi.com
2011-06-21 12:21 ` [patch 6/8 v5] x86, UV: remove cpumask_t from the stack cpw
2011-06-21 15:18 ` [tip:x86/uv] x86, UV: Remove " tip-bot for cpw@sgi.com
2011-06-21 12:21 ` [patch 7/8 v5] x86, UV: correct failed topology memory leak cpw
2011-06-21 15:18 ` [tip:x86/uv] x86, UV: Correct " tip-bot for cpw@sgi.com
2011-06-21 12:21 ` [patch 8/8 v5] x86, UV: correct UV2 BAU destination timeout cpw
2011-06-21 15:19 ` [tip:x86/uv] x86, UV: Correct " tip-bot for cpw@sgi.com
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