Re: [PATCH v2 07/19] OpenRISC: DMA

[Arnd Bergmann <arnd@arndb.de>]

On Friday 08 July 2011 09:36:19 Jonas Bonn wrote:
> I put a bit more thought into what we actually need for DMA and came up
> with the implementation in this patch.  This is a lot simpler than what
> we had before, but it seems to fit nicely with the model that we have.
> 
> The jist of it is that allocation of coherent memory just needs to
> return pages with the cache-inhibit bit set so we now:
> 
> i)   call __get_free_pages (via alloc_pages_exact)
> ii)  set the CI bit on those pages
> iii) flush the pages from cache
> 
> This should mean that we don't have any conflicting page table entries
> for these pages anymore.
> 
> I'd appreciate if you could look over this implementation to make sure
> I haven't missed anything fundamental.

Looks ok to me. A few more points for future optimization though:

* If your CPU can do different page sizes, you should make the kernel
  mapping use the largest possible page size. This will however make
  the dma mapping part much harder.

* If you ever want to map a frame buffer with this, you should
  add a write-combining mapping type, uncached accesses are really
  slow.

* Cache coherency is good. If you can make the hardware do cache-coherent
  DMA, then just use cacheable pages for alloc_coherent.

	Arnd