From: Cyrill Gorcunov <gorcunov@gmail.com>
To: Naga Chumbalkar <nagananda.chumbalkar@hp.com>
Cc: x86@kernel.org, suresh.b.siddha@intel.com,
linux-kernel@vger.kernel.org, hpa@zytor.com, mingo@elte.hu,
tglx@linutronix.de
Subject: Re: [PATCH] x86, x2apic: Preserve high 32-bits of IA32_APIC_BASE MSR
Date: Tue, 12 Jul 2011 11:05:31 +0400 [thread overview]
Message-ID: <20110712070531.GD27217@sun> (raw)
In-Reply-To: <20110712055831.2498.78521.sendpatchset@nchumbalkar.americas.cpqcorp.net>
On Tue, Jul 12, 2011 at 05:59:07AM +0000, Naga Chumbalkar wrote:
> If there's no special reason to zero-out the "high" 32-bits of the IA32_APIC_BASE
> MSR, let's preserve it.
>
> The x2APIC Specification doesn't explicitly state any such requirement. (Sec 2.2
> in: http://www.intel.com/Assets/PDF/manual/318148.pdf).
>
> Signed-off-by: Naga Chumbalkar <nagananda.chumbalkar@hp.com>
> Cc: Suresh Siddha <suresh.b.siddha@intel.com>
>
Looks like a good idea for me. I've reviewed some additional specs
and even some updates, nothing interesting found.
Reviewed-by: Cyrill Gorcunov <gorcunov@openvz.org>
next prev parent reply other threads:[~2011-07-12 7:05 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-07-12 5:59 [PATCH] x86, x2apic: Preserve high 32-bits of IA32_APIC_BASE MSR Naga Chumbalkar
2011-07-12 7:05 ` Cyrill Gorcunov [this message]
2011-07-12 17:29 ` Suresh Siddha
2011-07-12 18:21 ` H. Peter Anvin
2011-07-12 18:36 ` Suresh Siddha
2011-07-12 18:43 ` Chumbalkar, Nagananda
2011-07-13 3:06 ` [tip:x86/apic] " tip-bot for Naga Chumbalkar
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