From: Tony Breeds <tony@bakeyournoodle.com>
To: Ayman El-Khashab <ayman@elkhashab.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>,
linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: Re: [v2 PATCH 1/1] powerpc/4xx: enable and fix pcie gen1/gen2 on the 460sx
Date: Tue, 19 Jul 2011 11:23:51 +1000 [thread overview]
Message-ID: <20110719012351.GL20597@ozlabs.org> (raw)
In-Reply-To: <20110718133101.GB26701@crust.elkhashab.com>
On Mon, Jul 18, 2011 at 08:31:01AM -0500, Ayman El-Khashab wrote:
> Yes, but I think that is correct for it to be "1". The data
> sheets for these parts that I checked had bit 1 marked as
> reserved. Only OMR1MSKL and OMR3MSKL had extra definitions
> such as the _IO and _UOT. The parts I checked which were
> the sheets for the EX and SX (which cover another 6 or 7
> parts) all had it with just a single bit defined on that
> register.
Ahh okay. I kind of think that this may need to be a seperate change. At the
very least it needs to be explicitly mentioned in the change log.
Yours Tony
next prev parent reply other threads:[~2011-07-19 1:23 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-07-14 0:33 [PATCH 0/1] powerpc/4xx: enable and fix pcie gen1/gen2 on the 460sx Ayman El-Khashab
2011-07-14 0:33 ` [PATCH 1/1] " Ayman El-Khashab
2011-07-14 1:16 ` Tony Breeds
2011-07-14 16:04 ` Ayman El-Khashab
2011-07-14 22:36 ` Benjamin Herrenschmidt
2011-07-15 16:40 ` [v2 PATCH " Ayman Elkhashab
2011-07-18 4:01 ` Tony Breeds
2011-07-18 13:31 ` Ayman El-Khashab
2011-07-19 1:23 ` Tony Breeds [this message]
2011-07-20 13:02 ` [v3 PATCH 0/1] " Ayman Elkhashab
2011-07-20 13:02 ` [v3 PATCH 1/1] " Ayman Elkhashab
2011-07-21 0:59 ` Tony Breeds
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