Re: [PATCH 1/2] x86, ioapic: Reserve only 128 bytes for IOAPICs

H. Peter Anvin
2011-08-26T18:22:24Z

On 08/26/2011 11:09 AM, Cyrill Gorcunov wrote:
>
> Yes, one of the spec is Intel's MP specification (as far as I remember).
> Letme re-check...
>
> | 3.6.5 APIC Memory Mapping
> |
> | "Unlike the local APICs, the I/O APICs are mapped to give shared access from all
> | processors, providing full symmetric I/O access. The default base address for the
> | first I/O APIC is 0FEC0_0000h. Subsequent I/O APIC addresses are assigned in
> | 4K increments. For example, the second I/O APIC is at 0FEC0_1000h. Non-default
> | APIC base addresses can be used if the MP configuration table is provided.
> | (Refer to Chapter 4.) However, the local APIC base address must be aligned
> | on a 4K boundary, and the I/O APIC base address must be aligned on a 1K
> | boundary."
>
> Ie -- 4K increment with 1K base address. If I find other sources I have in mind
> I'll ping you.
>

OK, so that explicitly specifies a 1K alignment. The 4K bit seems to be
a default policy and not a requirement.

-hpa