Documentation/memory-barriers.txt

[Benjamin Poirier <benjamin.poirier@gmail.com>]

Hello David, Paul,

Thank you for this great piece on memory barriers. I think it made a
complex topic approachable. I have two questions:
1)
I had a hard time understanding the second part of the example in the
section "Sleep and wake-up functions".

> 	set_current_state(TASK_INTERRUPTIBLE);
> 	if (event_indicated)
> 		break;
> 	__set_current_state(TASK_RUNNING);
> 	do_something(my_data);

I understand the need for memory barriers, but I don't understand what
the code is trying to achieve.
Where are the for (;;) loop and the schedule() call gone to?

> 	set_current_state(TASK_INTERRUPTIBLE);
> 	if (event_indicated) {
> 		smp_rmb();
> 		do_something(my_data);
> 	}

Isn't a break; missing here? How come do_something() has moved inside
the condition?

I'm thinking these final example code bits should look like this
(without and with the smp_rmb), no?:

for (;;) {
	set_current_state(TASK_INTERRUPTIBLE);
	if (event_indicated) {
		smp_rmb();
		do_something(my_data);
		break;
	}
	schedule();
}
__set_current_state(TASK_RUNNING);

2)
On a more general note, why is there a read_barrier_depends() but not a
write_barrier_depends()?

l=7
"write_barrier_depends()"
g=&l

---

l=g
read_barrier_depends()
t=*l

Most processors do not reorder dependent loads but do reorder loads
after loads. I'm guessing there's no processor that does not reorder
dependent stores but that does reorder stores after stores. So there's
no point in having write_barrier_depends(), it would always be defined
to wmb()?

Thanks,
-Ben