From: Arnd Bergmann <arnd@arndb.de>
To: Mark Salter <msalter@redhat.com>
Cc: devicetree-discuss@lists.ozlabs.org,
Grant Likely <grant.likely@secretlab.ca>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 06/24] C6X: devicetree
Date: Tue, 13 Sep 2011 17:33:59 +0200 [thread overview]
Message-ID: <201109131733.59700.arnd@arndb.de> (raw)
In-Reply-To: <1315917546.11280.38.camel@deneb.redhat.com>
On Tuesday 13 September 2011, Mark Salter wrote:
> On Tue, 2011-09-13 at 08:43 +0200, Arnd Bergmann wrote:
> > Are these instructions specific to the interrupt controller or
> > do they access a register space that can contain arbitrary
> > devices?
> >
> > If there is a separate address space for special devices, it might
> > be good to describe that in the device tree, like we do for PCI
> > I/O space.
> >
>
> It is a core register area. Similar to ARM or MIPS coprocessor
> registers.
I guess it still depends, it's probably a grey area. If the register layout
is the same on all c6x cores and it's only for core stuff, there is no need
to put it in the device tree. If you have multiple soc (off-core) devices
being controlled through the registers, or the numbers vary a lot between
different chips, I would put all of them into the device tree.
Arnd
next prev parent reply other threads:[~2011-09-13 15:34 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-08-31 21:26 [PATCH v2 00/24] C6X: New architecture patch set Mark Salter
2011-08-31 21:26 ` [PATCH 01/24] fix default __strnlen_user macro Mark Salter
2011-08-31 23:30 ` Ryan Mallon
2011-09-01 1:38 ` Mark Salter
2011-09-01 1:54 ` Ryan Mallon
2011-09-01 19:23 ` Mark Salter
2011-09-01 23:34 ` Ryan Mallon
2011-08-31 21:26 ` [PATCH 02/24] fixed generic page.h for non-zero PAGE_OFFSET Mark Salter
2011-08-31 21:26 ` [PATCH 03/24] add ELF machine define for TI C6X DSPs Mark Salter
2011-08-31 21:26 ` [PATCH 04/24] C6X: build infrastructure Mark Salter
2011-08-31 21:26 ` [PATCH 05/24] C6X: early boot code Mark Salter
2011-08-31 21:26 ` [PATCH 06/24] C6X: devicetree Mark Salter
2011-09-12 20:11 ` Grant Likely
2011-09-12 23:20 ` Mark Salter
2011-09-13 6:43 ` Arnd Bergmann
2011-09-13 12:39 ` Mark Salter
2011-09-13 15:33 ` Arnd Bergmann [this message]
2011-09-13 17:54 ` Grant Likely
2011-09-13 20:11 ` Arnd Bergmann
2011-09-13 22:26 ` Mark Salter
2011-08-31 21:26 ` [PATCH 07/24] C6X: memory management and DMA support Mark Salter
2011-08-31 21:26 ` [PATCH 08/24] C6X: process management Mark Salter
2011-08-31 21:26 ` [PATCH 09/24] C6X: signal management Mark Salter
2011-09-01 9:50 ` Matt Fleming
2011-09-01 19:15 ` Mark Salter
2011-08-31 21:26 ` [PATCH 10/24] C6X: time management Mark Salter
2011-09-09 14:19 ` Thomas Gleixner
2011-09-12 14:12 ` Mark Salter
2011-09-13 1:16 ` john stultz
2011-09-13 3:18 ` Mark Salter
2011-09-13 3:44 ` john stultz
2011-08-31 21:26 ` [PATCH 11/24] C6X: interrupt handling Mark Salter
2011-09-09 14:33 ` Thomas Gleixner
2011-09-12 14:27 ` Mark Salter
2011-09-12 14:30 ` Thomas Gleixner
2011-09-12 20:01 ` Grant Likely
2011-08-31 21:26 ` [PATCH 12/24] C6X: syscalls Mark Salter
2011-08-31 21:26 ` [PATCH 13/24] C6X: traps Mark Salter
2011-08-31 21:26 ` [PATCH 14/24] C6X: clocks Mark Salter
2011-08-31 21:26 ` [PATCH 15/24] C6X: cache control Mark Salter
2011-08-31 21:26 ` [PATCH 16/24] C6X: loadable module support Mark Salter
2011-08-31 21:26 ` [PATCH 17/24] C6X: ptrace support Mark Salter
2011-08-31 21:26 ` [PATCH 18/24] C6X: headers Mark Salter
2011-08-31 21:26 ` [PATCH 19/24] C6X: library code Mark Salter
2011-08-31 21:26 ` [PATCH 20/24] C6X: general SoC support Mark Salter
2011-08-31 21:26 ` [PATCH 21/24] C6X: specific " Mark Salter
2011-08-31 21:26 ` [PATCH 22/24] C6X: EMIF - External Memory Interface Mark Salter
2011-08-31 21:26 ` [PATCH 23/24] C6X: Power and Sleep Controller Mark Salter
2011-08-31 21:34 ` [PATCH v2 00/24] C6X: New architecture patch set Mark Salter
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