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Date: Tue, 4 Oct 2011 15:18:00 +0200
From: Andi Kleen <andi@firstfloor.org>
To: Stephane Eranian <eranian@google.com>
Cc: Andi Kleen <andi@firstfloor.org>, Robert Richter <robert.richter@amd.com>,
        Peter Zijlstra <peterz@infradead.org>, Ingo Molnar <mingo@elte.hu>,
        LKML <linux-kernel@vger.kernel.org>, Don Zickus <dzickus@redhat.com>
Subject: Re: [V3][PATCH 0/7] perf, x86: Implement AMD IBS
Message-ID: <20111004131800.GD14482@one.firstfloor.org>
References: <1316597423-25723-1-git-send-email-robert.richter@amd.com> <1316778523.9084.17.camel@twins> <20110923122014.GP6063@erda.amd.com> <m2hb42ki5a.fsf@firstfloor.org> <CABPqkBRPvKxkyH6tVK1AQDBTbyrE3Cy0wjz64qaE2p0dzPRYig@mail.gmail.com>
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> There is Lin Ming's patch to expose PEBS Load Latency information.
> I will post a patch to export more of the machine state later on.

I have some patches to expose LBR and raw PEBS (similar to Robert's 
IBS patches, just for PEBS). But the user code still needs more work for that.

-Andi

-- 
ak@linux.intel.com -- Speaking for myself only.