From: Ingo Molnar <mingo@elte.hu>
To: Peter Zijlstra <peterz@infradead.org>
Cc: "Andi Kleen" <andi@firstfloor.org>,
"Robert Richter" <robert.richter@amd.com>,
"Stephane Eranian" <eranian@google.com>,
LKML <linux-kernel@vger.kernel.org>,
"Don Zickus" <dzickus@redhat.com>, acme <acme@ghostprotocols.net>,
"Frédéric Weisbecker" <fweisbec@gmail.com>,
"Thomas Gleixner" <tglx@linutronix.de>
Subject: Re: [V3][PATCH 0/7] perf, x86: Implement AMD IBS
Date: Mon, 10 Oct 2011 08:05:37 +0200 [thread overview]
Message-ID: <20111010060537.GE32173@elte.hu> (raw)
In-Reply-To: <1317746709.32543.23.camel@twins>
* Peter Zijlstra <peterz@infradead.org> wrote:
> On Tue, 2011-10-04 at 09:41 -0700, Andi Kleen wrote:
> > Ingo Molnar <mingo@elte.hu> writes:
> > >
> > > - Testable IBS user-space code a bit more prominently integrated
> > > than having to go down into a cellar with no working lights and
> > > finding the code on display in tools/perf/Documentation/examples/
> > > on the bottom of a locked filing cabinet stuck in a disused
> > > lavatory with a sign on the door saying 'Beware of the Leopard.'
> >
> > I looked at this for PEBS, and the best solution currently seems
> > to be a python script that works with perf script and does some post
> > processing to present the data as summary or individual samples.
> > I assume that could work for IBS too.
> >
> > Comments?
>
> I would much prefer perf {ibs,pebs} commands implemented in C, so
> that normal people can change/improve them too.
The other issue is performance, obviously. So for core functionality
we are pretty sure we want to offer to everyone C is the preferred
form.
Scripting integration *in addition* to that is obviously welcome too.
Thanks,
Ingo
prev parent reply other threads:[~2011-10-10 6:07 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-09-21 9:30 [V3][PATCH 0/7] perf, x86: Implement AMD IBS Robert Richter
2011-09-21 9:30 ` [V3][PATCH 1/7] perf, x86: share IBS macros between perf and oprofile Robert Richter
2011-09-21 9:30 ` [V3][PATCH 2/7] perf, x86: Implement IBS initialization Robert Richter
2011-09-21 9:30 ` [V3][PATCH 3/7] perf, x86: Implement IBS event configuration Robert Richter
2011-09-21 9:30 ` [V3][PATCH 4/7] perf, x86: Implement IBS interrupt handler Robert Richter
2011-09-22 21:51 ` Andi Kleen
2011-09-23 8:44 ` Robert Richter
2011-09-21 9:30 ` [V3][PATCH 5/7] perf, x86: Implement IBS pmu control ops Robert Richter
2011-09-21 9:30 ` [V3][PATCH 6/7] perf, x86: Implement 64 bit counter support for IBS Robert Richter
2011-09-21 9:30 ` [V3][PATCH 7/7] perf, x86: Example code for AMD IBS Robert Richter
2011-09-23 11:48 ` [V3][PATCH 0/7] perf, x86: Implement " Peter Zijlstra
2011-09-23 12:20 ` Robert Richter
2011-09-23 22:28 ` Andi Kleen
2011-09-25 15:20 ` David Ahern
2011-09-25 15:26 ` Andi Kleen
2011-09-25 15:29 ` David Ahern
2011-10-04 12:35 ` Stephane Eranian
2011-10-04 13:18 ` Andi Kleen
2011-10-04 13:20 ` Stephane Eranian
2011-10-04 8:27 ` Peter Zijlstra
2011-10-04 8:54 ` Ingo Molnar
2011-10-04 14:26 ` Robert Richter
2011-10-10 14:48 ` Robert Richter
2011-10-12 7:04 ` Ingo Molnar
2011-10-04 16:41 ` Andi Kleen
2011-10-04 16:45 ` Peter Zijlstra
2011-10-04 17:16 ` Robert Richter
2011-10-04 17:42 ` Andi Kleen
2011-10-10 6:05 ` Ingo Molnar [this message]
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