From: Borislav Petkov <bp@amd64.org>
To: "H. Peter Anvin" <hpa@zytor.com>, Ingo Molnar <mingo@elte.hu>,
Thomas Gleixner <tglx@linutronix.de>
Cc: Greg KH <greg@kroah.com>, linux-stable <stable@vger.kernel.org>,
X86-ML <x86@kernel.org>, LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 1/4] x86, amd: Avoid cache aliasing penalties on AMD family 15h
Date: Thu, 17 Nov 2011 12:48:52 +0100 [thread overview]
Message-ID: <20111117114852.GA22750@aftab> (raw)
In-Reply-To: <20111116232136.GA3533@kroah.com>
Ok, let's ping them directly.
x86 guys, do you have an issue with me backporting the aliasing fix to
3.x stable?
I know it doesn't adhere completely to -stable rules for it not being a
regression. Well, think of it as a hardware regression and me trying to
cover all bases :-).
Thanks.
On Wed, Nov 16, 2011 at 03:21:36PM -0800, Greg KH wrote:
> On Fri, Nov 04, 2011 at 08:25:32AM -0700, Greg KH wrote:
> > On Fri, Nov 04, 2011 at 12:26:32PM +0100, Borislav Petkov wrote:
> > > From: Borislav Petkov <borislav.petkov@amd.com>
> > >
> > > Upstream commit: dfb09f9b7ab03fd367740e541a5caf830ed56726
> > >
> > > This patch provides performance tuning for the "Bulldozer" CPU. With its
> > > shared instruction cache there is a chance of generating an excessive
> > > number of cache cross-invalidates when running specific workloads on the
> > > cores of a compute module.
> > >
> > > This excessive amount of cross-invalidations can be observed if cache
> > > lines backed by shared physical memory alias in bits [14:12] of their
> > > virtual addresses, as those bits are used for the index generation.
> > >
> > > This patch addresses the issue by clearing all the bits in the [14:12]
> > > slice of the file mapping's virtual address at generation time, thus
> > > forcing those bits the same for all mappings of a single shared library
> > > across processes and, in doing so, avoids instruction cache aliases.
> > >
> > > It also adds the command line option "align_va_addr=(32|64|on|off)" with
> > > which virtual address alignment can be enabled for 32-bit or 64-bit x86
> > > individually, or both, or be completely disabled.
> > >
> > > This change leaves virtual region address allocation on other families
> > > and/or vendors unaffected.
> > >
> > > Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
> > > Link: http://lkml.kernel.org/r/1312550110-24160-2-git-send-email-bp@amd64.org
> > > Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
> > > ---
> > > Documentation/kernel-parameters.txt | 13 ++++++
> > > arch/x86/include/asm/elf.h | 31 +++++++++++++
> > > arch/x86/kernel/cpu/amd.c | 13 ++++++
> > > arch/x86/kernel/sys_x86_64.c | 81 +++++++++++++++++++++++++++++++++-
> > > arch/x86/mm/mmap.c | 15 ------
> > > arch/x86/vdso/vma.c | 9 ++++
> > > 6 files changed, 144 insertions(+), 18 deletions(-)
> >
> > I really feel nervous adding this patch to the -stable tree(s). It's
> > bigger than "just a bugfix" and it adds new functionality.
> >
> > I'm aware that it is needed for your new hardware, which is great, but
> > it doesn't really follow the Documentation/stable_kernel_rules.txt
> > requirements, does it?
> >
> > I need an ACK from the x86 maintainers before I'm going to be
> > comfortable adding this, and then the other, patches in this series.
> >
> > Peter, Ingo, Thomas, your opinions?
>
> Ping?
>
> anyone?
>
> greg k-h
>
--
Regards/Gruss,
Boris.
Advanced Micro Devices GmbH
Einsteinring 24, 85609 Dornach
GM: Alberto Bozzo
Reg: Dornach, Landkreis Muenchen
HRB Nr. 43632 WEEE Registernr: 129 19551
next prev parent reply other threads:[~2011-11-17 11:48 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-11-04 11:22 [GIT PULL 3.1.x-stable] AMD F15h cache aliasing fixes Borislav Petkov
2011-11-04 11:26 ` [PATCH 1/4] x86, amd: Avoid cache aliasing penalties on AMD family 15h Borislav Petkov
2011-11-04 15:25 ` Greg KH
2011-11-16 23:21 ` Greg KH
2011-11-17 11:48 ` Borislav Petkov [this message]
2011-11-18 17:54 ` H. Peter Anvin
2011-11-28 0:01 ` Greg KH
2011-12-02 23:45 ` Greg KH
2011-11-04 11:26 ` [PATCH 2/4] x86: Add a BSP cpu_dev helper Borislav Petkov
2011-11-04 11:26 ` [PATCH 3/4] x86, amd: Move BSP code to " Borislav Petkov
2011-11-04 11:26 ` [PATCH 4/4] x86-32, amd: Move va_align definition to unbreak 32-bit build Borislav Petkov
2011-11-04 15:23 ` [GIT PULL 3.1.x-stable] AMD F15h cache aliasing fixes Greg KH
-- strict thread matches above, loose matches on Subject: below --
2011-11-04 11:11 [GIT PULL 3.0.x-stable] " Borislav Petkov
2011-11-04 11:15 ` [PATCH 1/4] x86, amd: Avoid cache aliasing penalties on AMD family 15h Borislav Petkov
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