linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Joerg Roedel <joro@8bytes.org>
To: Jerome Glisse <j.glisse@gmail.com>
Cc: Joerg Roedel <joerg.roedel@amd.com>,
	iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 20/22] iommu/amd: Implement IO page-fault handler
Date: Wed, 14 Dec 2011 17:17:08 +0100	[thread overview]
Message-ID: <20111214161708.GB4475@8bytes.org> (raw)
In-Reply-To: <20111214161300.GA4184@homer.localdomain>

On Wed, Dec 14, 2011 at 11:13:00AM -0500, Jerome Glisse wrote:
> On Mon, Dec 05, 2011 at 02:34:35PM +0100, Joerg Roedel wrote:
> > +	npages = get_user_pages(fault->state->task, fault->state->mm,
> > +				fault->address, 1, write, 0, &page, NULL);
> > +
> > +	if (npages == 1)
> > +		put_page(page);
> > +	else
> > +		set_pri_tag_status(fault->state, fault->tag, PPR_INVALID);
> 
> I might be missing something on how mm work in linux but can't the page
> in a vma change anytime (like being migrated to a node or being evicted
> ...) I guess my question is when a fault happen is it because the task
> page table have an invalid entry ?

Yes, but this is not a problem. When the page-fault handler signals
completion of the page-fault back to the device it will start to re-walk
the page-table. If the page-walker detects that the page is not there it
will just signal the fault again. MMU-Notifiers take care of the
TLB management.

> I was under the impression that their was a page table associated with
> each iommu client. Thus that the task page table was never directly use.
> But i haven't carrefully read all the patches.

The IOMMUv2 can handle x86 long-mode page-tables (including
accessed/dirty bits). So it is easy to just re-use the task page-tables
in the IOMMUv2.


Regards,

	Joerg


  reply	other threads:[~2011-12-14 16:17 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-12-05 13:34 [PATCH 0/22] Initial AMD IOMMUv2 support Joerg Roedel
2011-12-05 13:34 ` [PATCH 01/22] iommu/amd: Convert dev_table_entry to u64 Joerg Roedel
2011-12-05 13:34 ` [PATCH 02/22] iommu/amd: Fix wrong address masks in tlb flush code Joerg Roedel
2011-12-05 13:34 ` [PATCH 03/22] iommu/amd: Get the maximum number of PASIDs supported Joerg Roedel
2011-12-05 13:34 ` [PATCH 04/22] iommu/amd: Setup PPR log when supported by IOMMU Joerg Roedel
2011-12-05 13:34 ` [PATCH 05/22] iommu/amd: Enable GT mode " Joerg Roedel
2011-12-05 13:34 ` [PATCH 06/22] iommu/amd: Add iommuv2 flag to struct amd_iommu Joerg Roedel
2011-12-05 13:34 ` [PATCH 07/22] iommu/amd: Put IOMMUv2 capable devices in pt_domain Joerg Roedel
2011-12-05 13:34 ` [PATCH 08/22] iommu/amd: Implement notifier for PPR faults Joerg Roedel
2011-12-05 13:34 ` [PATCH 09/22] iommu/amd: Add amd_iommu_domain_direct_map function Joerg Roedel
2011-12-05 13:34 ` [PATCH 10/22] iommu/amd: Add support for IOMMUv2 domain mode Joerg Roedel
2011-12-05 13:34 ` [PATCH 11/22] iommu/amd: Implement IOMMUv2 TLB flushing routines Joerg Roedel
2011-12-05 13:34 ` [PATCH 12/22] iommu/amd: Implement functions to manage GCR3 table Joerg Roedel
2011-12-05 13:34 ` [PATCH 13/22] iommu/amd: Implement function to send PPR completions Joerg Roedel
2011-12-05 13:34 ` [PATCH 14/22] iommu/amd: Add function to get IOMMUv2 domain for pdev Joerg Roedel
2011-12-05 13:34 ` [PATCH 15/22] iommu/amd: Add device errata handling Joerg Roedel
2011-12-05 13:34 ` [PATCH 16/22] iommu/amd: Add stat counter for IOMMUv2 events Joerg Roedel
2011-12-05 13:34 ` [PATCH 17/22] iommu/amd: Add driver stub for AMD IOMMUv2 support Joerg Roedel
2011-12-05 13:34 ` [PATCH 18/22] iommu/amd: Implement device aquisition code for IOMMUv2 Joerg Roedel
2011-12-05 13:34 ` [PATCH 19/22] iommu/amd: Add routines to bind/unbind a pasid Joerg Roedel
2011-12-05 13:34 ` [PATCH 20/22] iommu/amd: Implement IO page-fault handler Joerg Roedel
2011-12-14 16:13   ` Jerome Glisse
2011-12-14 16:17     ` Joerg Roedel [this message]
2011-12-05 13:34 ` [PATCH 21/22] iommu/amd: Implement notifiers for IOMMUv2 Joerg Roedel
2011-12-05 13:34 ` [PATCH 22/22] iommu/amd: Add invalid_ppr callback Joerg Roedel
2011-12-08 20:47 ` [PATCH 0/22] Initial AMD IOMMUv2 support Jerome Glisse
2011-12-09 14:43   ` Joerg Roedel
2011-12-14 14:26 ` Joerg Roedel

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20111214161708.GB4475@8bytes.org \
    --to=joro@8bytes.org \
    --cc=iommu@lists.linux-foundation.org \
    --cc=j.glisse@gmail.com \
    --cc=joerg.roedel@amd.com \
    --cc=linux-kernel@vger.kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).