[PATCH] mfd/db8500-prcmu: remove support for early silicon revisions

[PATCH] mfd/db8500-prcmu: remove support for early silicon revisions

[Linus Walleij]

From: Linus Walleij <linus.walleij@linaro.org>

The DB8500 ED (Early Drop) and V1 are only available inside of
ST-Ericsson or partners, we have actively replaced and scrapped
these prototypes. All Nova products on the open market (such as
the Snowball board) are based on V2 and later ASIC variants.
So let us focus on supporting the silicon that will be used and
delete this to get a clear overview.

Cc: Samuel Ortiz <samuel.ortiz@intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
Sam if this is OK with you I'd prefer to take this one patch
through the ux500 tree since it depends on other changes there
so your ACK would be appreciated!
---
 drivers/mfd/db8500-prcmu.c |    7 ++-----
 1 files changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c
index a25ab9c..af8e0ef 100644
--- a/drivers/mfd/db8500-prcmu.c
+++ b/drivers/mfd/db8500-prcmu.c
@@ -2102,14 +2102,11 @@ static struct irq_chip prcmu_irq_chip = {
 void __init db8500_prcmu_early_init(void)
 {
 	unsigned int i;
-
-	if (cpu_is_u8500v1()) {
-		tcdm_base = __io_address(U8500_PRCMU_TCDM_BASE_V1);
-	} else if (cpu_is_u8500v2()) {
+	if (cpu_is_u8500v2()) {
 		void *tcpm_base = ioremap_nocache(U8500_PRCMU_TCPM_BASE, SZ_4K);
 
 		if (tcpm_base != NULL) {
-			int version;
+			u32 version;
 			version = readl(tcpm_base + PRCMU_FW_VERSION_OFFSET);
 			prcmu_version.project_number = version & 0xFF;
 			prcmu_version.api_version = (version >> 8) & 0xFF;
-- 
1.7.3.2

Re: [PATCH] mfd/db8500-prcmu: remove support for early silicon revisions

[Samuel Ortiz]

Hi Linus

On Thu, Dec 15, 2011 at 11:21:43PM +0100, Linus Walleij wrote:
> From: Linus Walleij <linus.walleij@linaro.org>
> 
> The DB8500 ED (Early Drop) and V1 are only available inside of
> ST-Ericsson or partners, we have actively replaced and scrapped
> these prototypes. All Nova products on the open market (such as
> the Snowball board) are based on V2 and later ASIC variants.
> So let us focus on supporting the silicon that will be used and
> delete this to get a clear overview.
> 
> Cc: Samuel Ortiz <samuel.ortiz@intel.com>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> Sam if this is OK with you I'd prefer to take this one patch
> through the ux500 tree since it depends on other changes there
> so your ACK would be appreciated!
Sure, that one looks fine to me:

Acked-by: Samuel Ortiz <sameo@linux.intel.com>

Cheers,
Samuel.

-- 
Intel Open Source Technology Centre
http://oss.intel.com/
---------------------------------------------------------------------
Intel Corporation SAS (French simplified joint stock company)
Registered headquarters: "Les Montalets"- 2, rue de Paris, 
92196 Meudon Cedex, France
Registration Number:  302 456 199 R.C.S. NANTERRE
Capital: 4,572,000 Euros

This e-mail and any attachments may contain confidential material for
the sole use of the intended recipient(s). Any review or distribution
by others is strictly prohibited. If you are not the intended
recipient, please contact the sender and delete all copies.