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From: Ingo Molnar <mingo@elte.hu>
To: Avi Kivity <avi@redhat.com>
Cc: Robert Richter <robert.richter@amd.com>,
	Benjamin Block <bebl@mageta.org>,
	Hans Rosenfeld <hans.rosenfeld@amd.com>,
	hpa@zytor.com, tglx@linutronix.de, suresh.b.siddha@intel.com,
	eranian@google.com, brgerst@gmail.com, Andreas.Herrmann3@amd.com,
	x86@kernel.org, linux-kernel@vger.kernel.org,
	Benjamin Block <benjamin.block@amd.com>
Subject: Re: [RFC 4/5] x86, perf: implements lwp-perf-integration (rc1)
Date: Tue, 20 Dec 2011 11:09:17 +0100	[thread overview]
Message-ID: <20111220100916.GA20788@elte.hu> (raw)
In-Reply-To: <4EF05996.8030807@redhat.com>


* Avi Kivity <avi@redhat.com> wrote:

> On 12/20/2011 11:15 AM, Ingo Molnar wrote:
>
> > The LWPCB and the LWP ring-buffer are really just an 
> > extension of that concept: per task buffers which are ring 3 
> > visible.
> 
> No, it's worse.  They are ring 3 writeable, and ring 3 
> configurable.

Avi, i know that very well.

> > Note that user-space does not actually have to know about 
> > any of these LWP addresses (but can access them if it wants 
> > to - no strong feelings about that) - in the correctly 
> > implemented model it's fully kernel managed.
> 
> btw, that means that the intended use case - self-monitoring 
> with no kernel support - cannot be done. [...]

Arguably many years ago the hardware was designed for brain-dead 
instrumentation abstractions.

Note that as i said user-space *can* acccess the area if it 
thinks it can do it better than the kernel (and we could export 
that information in a well defined way - we could do the same 
for PEBS as well) - i have no particular strong feelings about 
allowing that other than i think it's an obviously inferior 
model - *as long* as proper, generic, usable support is added.

>From my perspective there's really just one realistic option to 
accept this feature: if it's properly fit into existing, modern 
instrumentation abstractions. I made that abundantly clear in my 
feedback so far.

It can obviously be done, alongside the suggestions i've given.

That was the condition for Intel PEBS/DS/BTS support as well - 
which is hardware that has at least as many brain-dead 
constraints and roadblocks as LWP.

> > > You could rebuild the LWP block on every context switch I 
> > > guess, but you need to prevent access to other cpus' LWP 
> > > blocks (since they may be running other processes).  I 
> > > think this calls for per-cpu cr3, even for threads in the 
> > > same process.
> >
> > Why would we want to rebuild the LWPCB? Just keep one per 
> > task and do a lightweight switch to it during switch_to() - 
> > like we do it with the PEBS hardware-ring-buffer. It can be 
> > in the same single block of memory with the ring-buffer 
> > itself. (PEBS has similar characteristics)
> 
> If it's in globally visible memory, the user can reprogram the 
> LWP from another thread to thrash ordinary VMAs. [...]

User-space can smash it and make it not profile or profile the 
wrong thing or into the wrong buffer - but LWP itself runs with 
ring3 privileges so it won't do anything the user couldnt do 
already.

Lack of protection against self-misconfiguration-damage is a 
benign hardware mis-feature - something for LWP v2 to specify i 
guess.

But i don't want to reject this feature based on this 
mis-feature alone - it's a pretty harmless limitation and the 
precise, skid-less profiling that LWP offers is obviously 
useful.

> [...]  It has to be process local (at which point, you can 
> just use do_mmap() to allocate it).

get_unmapped_area() + install_special_mapping() is probably 
better, but yeah.

Thanks,

	Ingo

  reply	other threads:[~2011-12-20 10:11 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-11-29 12:41 [PATCH 0/9] rework of extended state handling, LWP support Hans Rosenfeld
2011-11-29 12:41 ` [PATCH 1/9] x86, xsave: warn on #NM exceptions caused by the kernel Hans Rosenfeld
2011-11-29 12:41 ` [PATCH 2/9] x86, xsave: cleanup fpu/xsave support Hans Rosenfeld
2011-11-29 12:41 ` [PATCH 3/9] x86, xsave: cleanup fpu/xsave signal frame setup Hans Rosenfeld
2011-11-29 12:41 ` [PATCH 4/9] x86, xsave: rework fpu/xsave support Hans Rosenfeld
2011-11-29 12:41 ` [PATCH 5/9] x86, xsave: remove unused code Hans Rosenfeld
2011-11-29 12:41 ` [PATCH 6/9] x86, xsave: more cleanups Hans Rosenfeld
2011-11-29 12:41 ` [PATCH 7/9] x86, xsave: remove lazy allocation of xstate area Hans Rosenfeld
2011-11-29 12:41 ` [PATCH 8/9] x86, xsave: add support for non-lazy xstates Hans Rosenfeld
2011-11-29 12:41 ` [PATCH 9/9] x86, xsave: add kernel support for AMDs Lightweight Profiling (LWP) Hans Rosenfeld
2011-11-29 21:31 ` [PATCH 0/9] rework of extended state handling, LWP support Andi Kleen
2011-11-30 17:37   ` Hans Rosenfeld
2011-11-30 21:52     ` Andi Kleen
2011-12-01 20:36       ` Hans Rosenfeld
2011-12-02  2:01         ` H. Peter Anvin
2011-12-02 11:20           ` Hans Rosenfeld
2011-12-07 19:57             ` Hans Rosenfeld
2011-12-07 20:00               ` [PATCH 7/8] x86, xsave: add support for non-lazy xstates Hans Rosenfeld
2011-12-07 20:00                 ` [PATCH 8/8] x86, xsave: add kernel support for AMDs Lightweight Profiling (LWP) Hans Rosenfeld
2011-12-05 10:22 ` [PATCH 0/9] rework of extended state handling, LWP support Ingo Molnar
2011-12-16 16:07   ` Hans Rosenfeld
2011-12-16 16:12     ` [RFC 1/5] x86, perf: Implement software-activation of lwp Hans Rosenfeld
2011-12-16 16:12       ` [RFC 2/5] perf: adds prototype for a new perf-context-type Hans Rosenfeld
2011-12-16 16:12       ` [RFC 3/5] perf: adds a new pmu-initialization-call Hans Rosenfeld
2011-12-16 16:12       ` [RFC 4/5] x86, perf: implements lwp-perf-integration (rc1) Hans Rosenfeld
2011-12-18  8:04         ` Ingo Molnar
2011-12-18 15:22           ` Benjamin Block
2011-12-18 23:43             ` Ingo Molnar
2011-12-19  9:09               ` Robert Richter
2011-12-19 10:54                 ` Ingo Molnar
2011-12-19 11:12                   ` Avi Kivity
2011-12-19 11:40                     ` Ingo Molnar
2011-12-19 11:58                       ` Avi Kivity
2011-12-19 18:13                         ` Benjamin
2011-12-20  8:56                           ` Ingo Molnar
2011-12-20  9:15                         ` Ingo Molnar
2011-12-20  9:47                           ` Avi Kivity
2011-12-20 10:09                             ` Ingo Molnar [this message]
2011-12-20 15:27                               ` Joerg Roedel
2011-12-20 18:40                                 ` Ingo Molnar
2011-12-21  0:07                                   ` Joerg Roedel
2011-12-21 12:34                                     ` Ingo Molnar
2011-12-21 12:44                                       ` Avi Kivity
2011-12-21 13:22                                         ` Ingo Molnar
2011-12-21 22:49                                           ` Joerg Roedel
2011-12-23 10:53                                             ` Ingo Molnar
2011-12-21 11:46                                   ` Gleb Natapov
2011-12-23 10:56                                     ` Ingo Molnar
2011-12-20 15:48                           ` Vince Weaver
2011-12-20 18:27                             ` Ingo Molnar
2011-12-20 22:47                               ` Vince Weaver
2011-12-21 12:00                                 ` Ingo Molnar
2011-12-21 13:55                                   ` Vince Weaver
2011-12-16 16:12       ` [RFC 5/5] x86, perf: adds support for the LWP threshold-int Hans Rosenfeld

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