Re: [RFC 4/5] x86, perf: implements lwp-perf-integration (rc1)

Ingo Molnar
2011-12-23T10:58:15Z

* Gleb Natapov <gleb@redhat.com> wrote:

> On Tue, Dec 20, 2011 at 07:40:04PM +0100, Ingo Molnar wrote:
> > > The point is, if user-space re-programs LWP it will continue
> > > to write its samples to the new ring-buffer virtual-address
> > > set up by user-space. It will still use that virtual address
> > > in another address-space after a task-switch. This allows
> > > processes to corrupt memory of other processes. [...]
> >
> > That's nonsense. As i said it my previous mail the LWPC
> > should be per task and switched on task switch - just like
> > the DS/PEBS context is.
>
> Is it? Looking at arch/x86/kernel/cpu/perf_event_intel_ds.c it
> seems like DS is per cpu, not per task.

We flush it on context switch and reuse it for the next task via
the x86_pmu.drain_pebs() callback - so the buffering of PEBS
events is per task.

Thanks,

Ingo