Re: [PATCH 1/3] mce: Add a msg string to the MCE tracepoint

[Borislav Petkov <bp@amd64.org>]

On Wed, Feb 29, 2012 at 05:33:51PM +0000, Luck, Tony wrote:
> > IOW, we want to assume that cores 0, 1, 2 ... k-1 are on node 0; k, k+1
> > ... 2k-1 belong to node 1, etc., where k is the number of cores on a
> > socket and thus we have a regular core enumeration on the box.
> 
> Sounds dubious:
> 
> Booting Node   0, Processors  #1 #2 #3 #4 #5 #6 #7 Ok.
> Booting Node   1, Processors  #8 #9 #10 #11 #12 #13 #14 #15 Ok.
> Booting Node   0, Processors  #16 #17 #18 #19 #20 #21 #22 #23 Ok.
> Booting Node   1, Processors  #24 #25 #26 #27 #28 #29 #30 #31
> Brought up 32 CPUs
> 
> Now those are logical cpu numbers, and we brought up the first HT
> thread on each core first, and then came around for a 2nd pass
> bringing up the other HT thread.  This order is determined by
> how the BIOS lists the cpus (and in this case it seems to be
> doing so according to recommendations) - so here our core numbers
> will match what you said. But the BIOS could do something
> strange and list logical cpus alternating between sockets. In
> which case cores 0, 2, 4, 6 ... would be on node 0, and cores
> 1, 3, 5, 7, ... on node 1.

Ok, the example above actually confirms my fear that you won't be always
able to map back to a physical socket from the CPU number. So, we'll
need the ->socketid field which is the physical processor ID we get from
CPUID leafs.

Then, mapping back the socketid to the silkscreen labels on the boards
should be easy because on the boxes I have here, they go like this: P0,
P1, ..., where P0 is the socket containing the BSP, P1 is the second
socket etc. I'm guessing this is similar on Intel boards...?

Thanks.

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Boris.

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