From: Daniel Vetter <daniel@ffwll.ch>
To: Daniel Kurtz <djkurtz@chromium.org>
Cc: Chris Wilson <chris@chris-wilson.co.uk>,
Daniel Vetter <daniel@ffwll.ch>,
Keith Packard <keithp@keithp.com>,
David Airlie <airlied@linux.ie>,
dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
Benson Leung <bleung@chromium.org>,
Yufeng Shen <miletus@chromium.org>
Subject: Re: [PATCH 5/7 v6] drm/i915/intel_i2c: use INDEX cycles for i2c read transactions
Date: Thu, 29 Mar 2012 11:25:32 +0200 [thread overview]
Message-ID: <20120329092532.GF4106@phenom.ffwll.local> (raw)
In-Reply-To: <CAGS+omBWDoc2YiKPmBJ7=iEr+1DFBZp0EDCpPwP9c7FcbC4iew@mail.gmail.com>
On Thu, Mar 29, 2012 at 04:37:18PM +0800, Daniel Kurtz wrote:
> On Thu, Mar 29, 2012 at 2:52 AM, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> > On Thu, 29 Mar 2012 02:26:37 +0800, Daniel Kurtz <djkurtz@chromium.org> wrote:
> >> It is very common for an i2c device to require a small 1 or 2 byte write
> >> followed by a read. For example, when reading from an i2c EEPROM it is
> >> common to write and address, offset or index followed by a reading some
> >> values.
> >
> > Hmm, I have
> >
> > "gmbus1, bits 8-15: 8-bit GMBUS slave register
> > This field is redundant and should not be used."
> >
> > Scary. :)
>
> Perhaps INDEX ops are only available on some chipsets?
> Is this something you can double check?
I think index ops are available, the text sounds more like a hint to the
programmer that for VCH devices you should use word reg index access (i.e.
gmbus 5). We'll see when it blows up.
-Daniel
--
Daniel Vetter
Mail: daniel@ffwll.ch
Mobile: +41 (0)79 365 57 48
next prev parent reply other threads:[~2012-03-29 9:25 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-03-28 18:26 [PATCH 0/7 v6] fix gmbus writes and related issues Daniel Kurtz
2012-03-28 18:26 ` [PATCH 1/7 v6] drm/i915/intel_i2c: handle zero-length writes Daniel Kurtz
2012-03-28 18:34 ` Chris Wilson
2012-03-28 18:26 ` [PATCH 2/7 v6] drm/i915/intel_i2c: use double-buffered writes Daniel Kurtz
2012-03-28 18:41 ` Chris Wilson
2012-03-29 8:46 ` Daniel Kurtz
2012-03-29 9:15 ` Daniel Vetter
2012-03-28 18:26 ` [PATCH 3/7 v6] drm/i915/intel_i2c: always wait for IDLE before clearing NAK Daniel Kurtz
2012-03-28 18:26 ` [PATCH 4/7 v6] drm/i915/intel_i2c: use WAIT cycle, not STOP Daniel Kurtz
2012-03-28 18:48 ` Chris Wilson
2012-03-29 8:39 ` Daniel Kurtz
2012-03-28 18:26 ` [PATCH 5/7 v6] drm/i915/intel_i2c: use INDEX cycles for i2c read transactions Daniel Kurtz
2012-03-28 18:52 ` Chris Wilson
2012-03-29 8:37 ` Daniel Kurtz
2012-03-29 9:25 ` Daniel Vetter [this message]
2012-03-28 18:26 ` [PATCH 6/7 v6] drm/i915/intel_i2c: reuse GMBUS2 value read in polling loop Daniel Kurtz
2012-03-28 18:53 ` Chris Wilson
2012-03-28 18:26 ` [PATCH 7/7 v6] drm/i915/intel_i2c: remove POSTING_READ() from gmbus transfers Daniel Kurtz
2012-03-28 18:53 ` Chris Wilson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20120329092532.GF4106@phenom.ffwll.local \
--to=daniel@ffwll.ch \
--cc=airlied@linux.ie \
--cc=bleung@chromium.org \
--cc=chris@chris-wilson.co.uk \
--cc=djkurtz@chromium.org \
--cc=dri-devel@lists.freedesktop.org \
--cc=keithp@keithp.com \
--cc=linux-kernel@vger.kernel.org \
--cc=miletus@chromium.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox