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From: "Luis R. Rodriguez" <rodrigue@qca.qualcomm.com>
To: xiong <xiong@qca.qualcomm.com>
Cc: davem@davemloft.net, netdev@vger.kernel.org,
	linux-kernel@vger.kernel.org, qca-linux-team@qualcomm.com,
	nic-devel@qualcomm.com
Subject: Re: [PATCH 01/10] atl1c: add workaround for issue of bit INTX-disable for MSI interrupt
Date: Fri, 27 Apr 2012 19:05:10 -0700	[thread overview]
Message-ID: <20120428020510.GJ14465@tux> (raw)
In-Reply-To: <1335578325-21326-2-git-send-email-xiong@qca.qualcomm.com>

On Sat, Apr 28, 2012 at 09:58:36AM +0800, xiong wrote:
> All supported devices have one issue that msi interrupt doesn't assert
> if pci command register bit (PCI_COMMAND_INTX_DISABLE) is set.
> Add workaround in drivers/pci/quirks.c
> 
> Signed-off-by: xiong <xiong@qca.qualcomm.com>
> ---
>  drivers/pci/quirks.c |   12 ++++++++++++
>  1 files changed, 12 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index 4bf7102..953ec3f 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -2626,6 +2626,18 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x4374,
>  DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x4375,
>  			quirk_msi_intx_disable_bug);
>  
> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x1062,
> +			quirk_msi_intx_disable_bug);
> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x1063,
> +			quirk_msi_intx_disable_bug);
> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x2060,
> +			quirk_msi_intx_disable_bug);
> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x2062,
> +			quirk_msi_intx_disable_bug);
> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x1073,
> +			quirk_msi_intx_disable_bug);
> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x1083,
> +			quirk_msi_intx_disable_bug);
>  #endif /* CONFIG_PCI_MSI */

Xiong -- just a heads up, I think to backport these then you can
send me patches for compat-wireless to do the work around itself on
the driver on a patch under patches/ you can say create a 
58-drivers-pci-quirks.patch which pathces your driver there.

  Luis

  reply	other threads:[~2012-04-28  2:05 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-04-28  1:58 [PATCH 00/10] atl1c: update hardware settings - v4 xiong
2012-04-28  1:58 ` [PATCH 01/10] atl1c: add workaround for issue of bit INTX-disable for MSI interrupt xiong
2012-04-28  2:05   ` Luis R. Rodriguez [this message]
2012-04-28  9:53     ` Huang, Xiong
2012-04-28 17:21       ` Luis R. Rodriguez
2012-04-28  1:58 ` [PATCH 02/10] atl1c: add PHY link event(up/down) patch xiong
2012-04-28 17:24   ` Florian Fainelli
2012-04-29 10:07     ` Huang, Xiong
2012-04-29 12:25     ` 答复: " Huang, Xiong
2012-04-28  1:58 ` [PATCH 03/10] atl1c: clear WoL status when reset pcie xiong
2012-04-28  1:58 ` [PATCH 04/10] atl1c: remove code of closing register writable attribution xiong
2012-04-28  1:58 ` [PATCH 05/10] atl1c: refine mac address related code xiong
2012-04-28  1:58 ` [PATCH 06/10] atl1c: enlarge L1 response waiting timer xiong
2012-04-28  1:58 ` [PATCH 07/10] atl1c: cancel task when interface closed xiong
2012-04-28  1:58 ` [PATCH 08/10] atl1c: do MAC-reset when PHY link down xiong
2012-04-28  1:58 ` [PATCH 09/10] atl1c: Disable L0S when no cable link xiong
2012-04-28  1:58 ` [PATCH 10/10] atl1c: remove PHY polling from atl1c_change_mtu xiong
2012-04-30 17:35 ` [PATCH 00/10] atl1c: update hardware settings - v4 David Miller
2012-05-01  1:08   ` Huang, Xiong
  -- strict thread matches above, loose matches on Subject: below --
2012-05-01  1:38 xiong
2012-05-01  1:38 ` [PATCH 01/10] atl1c: add workaround for issue of bit INTX-disable for MSI interrupt xiong

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