Re: [PATCH] gpio/msm-v1: re-read IRQ flags on each iteration

[David Brown <davidb@codeaurora.org>]

On Wed, May 16, 2012 at 09:23:33AM +0200, Linus Walleij wrote:
> On Wed, May 16, 2012 at 3:09 AM, David Brown <davidb@codeaurora.org> wrote:
> > On Fri, May 11, 2012 at 11:41:12AM -0600, Grant Likely wrote:
> 
> >> I'll need an ack from an msm developer before applying this.
> >
> > I though I saw Jeff Ohlstein reply, but I'm not finding that message.
> 
> He was replying to a similar patch affecting the DMA controller
> interrupt-like construct.
> 
> > I believe this patch is actually incorrect.  The register needs to
> > only be read once, and the bits walked through.  If another interrupt
> > comes in during the loop, the interrupt will remain asserted, and we
> > will re-enter the irq handler.  I suppose it could be wrapped in yet
> > another loop, but I'm not sure it is worth it.
> 
> OK the code doesn't say really. (It did say something like that
> in the DMA controller). It's quite uncommon with these type of
> latched-clear registers (reading IRQ status clears the flags) type
> of hardware so maybe it should be commented.

I'll see if I can get confirmation on it.

> > I'm pretty sure the code works as it is, since it is the same as the
> > code in the Android kernel.
> 
> The problem with this bug is that it often works until you get a
> demanding case. On the VIC I guess it wasn't noticed until tested with
> a device that raised a storm of IRQs so the handler started missing
> them.

At one point, the target got a lot of use, so I'm going to guess the
current code is correct.  I'll see if I can dig up a definitive
answer, though.  Since I don't have one to even test on, I'm a little
reluctant to change the code, though.

David

-- 
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.