From: Ingo Molnar <mingo@kernel.org>
To: Alexander Gordeev <agordeev@redhat.com>
Cc: linux-kernel@vger.kernel.org, x86@kernel.org,
Suresh Siddha <suresh.b.siddha@intel.com>,
Cyrill Gorcunov <gorcunov@openvz.org>,
Yinghai Lu <yinghai@kernel.org>
Subject: Re: [PATCH 2/3] x86: x2apic/cluster: Make use of lowest priority delivery mode
Date: Mon, 21 May 2012 10:22:40 +0200 [thread overview]
Message-ID: <20120521082240.GA31407@gmail.com> (raw)
In-Reply-To: <20120518102640.GB31517@dhcp-26-207.brq.redhat.com>
* Alexander Gordeev <agordeev@redhat.com> wrote:
> Currently x2APIC in logical destination mode delivers
> interrupts to a single CPU, no matter how many CPUs were
> specified in the destination cpumask.
>
> This fix enables delivery of interrupts to multiple CPUs by
> bit-ORing Logical IDs of destination CPUs that have matching
> Cluster ID.
>
> Because only one cluster could be specified in a message
> destination address, the destination cpumask is tried for a
> cluster that contains maximum number of CPUs matching this
> cpumask. The CPUs in this cluster are selected to receive the
> interrupts while all other CPUs (in the cpumask) are ignored.
I'm wondering how you tested this. AFAICS current irqbalanced
will create masks but on x2apic only the first CPU is targeted
by the kernel.
So, in theory, prior the patch you should be seeing irqs go to
only one CPU, while after the patch they are spread out amongst
the CPU. If it's using LowestPrio delivery then we depend on the
hardware doing this for us - how does this work out in practice,
are the target CPUs round-robin-ed, with a new CPU for every new
IRQ delivered?
Thanks,
Ingo
next prev parent reply other threads:[~2012-05-21 8:22 UTC|newest]
Thread overview: 69+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-18 10:26 [PATCH 2/3] x86: x2apic/cluster: Make use of lowest priority delivery mode Alexander Gordeev
2012-05-18 14:41 ` Cyrill Gorcunov
2012-05-18 15:42 ` Alexander Gordeev
2012-05-18 15:51 ` Cyrill Gorcunov
2012-05-19 10:47 ` Cyrill Gorcunov
2012-05-21 7:11 ` Alexander Gordeev
2012-05-21 9:46 ` Cyrill Gorcunov
2012-05-19 20:53 ` Yinghai Lu
2012-05-21 8:13 ` Alexander Gordeev
2012-05-21 23:02 ` Yinghai Lu
2012-05-21 23:33 ` Yinghai Lu
2012-05-22 9:36 ` Alexander Gordeev
2012-05-21 23:44 ` Suresh Siddha
2012-05-21 23:58 ` [PATCH 1/2] x86, irq: update irq_cfg domain unless the new affinity is a subset of the current domain Suresh Siddha
2012-05-21 23:58 ` [PATCH 2/2] x2apic, cluster: use all the members of one cluster specified in the smp_affinity mask for the interrupt desintation Suresh Siddha
2012-05-22 7:04 ` Ingo Molnar
2012-05-22 7:34 ` Cyrill Gorcunov
2012-05-22 17:21 ` Suresh Siddha
2012-05-22 17:39 ` Cyrill Gorcunov
2012-05-22 17:42 ` Suresh Siddha
2012-05-22 17:45 ` Cyrill Gorcunov
2012-05-22 20:03 ` Yinghai Lu
2012-06-06 15:04 ` [tip:x86/apic] x86/x2apic/cluster: Use all the members of one cluster specified in the smp_affinity mask for the interrupt destination tip-bot for Suresh Siddha
2012-06-06 22:21 ` Yinghai Lu
2012-06-06 23:14 ` Suresh Siddha
2012-06-06 15:03 ` [tip:x86/apic] x86/irq: Update irq_cfg domain unless the new affinity is a subset of the current domain tip-bot for Suresh Siddha
2012-08-07 15:31 ` Robert Richter
2012-08-07 15:41 ` do_IRQ: 1.55 No irq handler for vector (irq -1) Borislav Petkov
2012-08-07 16:24 ` Suresh Siddha
2012-08-07 17:28 ` Robert Richter
2012-08-07 17:47 ` Suresh Siddha
2012-08-07 17:45 ` Eric W. Biederman
2012-08-07 20:57 ` Borislav Petkov
2012-08-07 22:39 ` Suresh Siddha
2012-08-08 8:58 ` Robert Richter
2012-08-08 11:04 ` Borislav Petkov
2012-08-08 19:16 ` Suresh Siddha
2012-08-14 17:02 ` [tip:x86/urgent] x86, apic: fix broken legacy interrupts in the logical apic mode tip-bot for Suresh Siddha
2012-06-06 17:20 ` [PATCH 1/2] x86, irq: update irq_cfg domain unless the new affinity is a subset of the current domain Alexander Gordeev
2012-06-06 23:02 ` Suresh Siddha
2012-06-16 0:25 ` Suresh Siddha
2012-06-18 9:17 ` Alexander Gordeev
2012-06-19 0:51 ` Suresh Siddha
2012-06-19 23:43 ` [PATCH 1/2] x86, apic: optimize cpu traversal in __assign_irq_vector() using domain membership Suresh Siddha
2012-06-19 23:43 ` [PATCH 2/2] x86, x2apic: limit the vector reservation to the user specified mask Suresh Siddha
2012-06-20 5:56 ` Yinghai Lu
2012-06-21 9:04 ` Alexander Gordeev
2012-06-21 21:51 ` Suresh Siddha
2012-06-20 5:53 ` [PATCH 1/2] x86, apic: optimize cpu traversal in __assign_irq_vector() using domain membership Yinghai Lu
2012-06-21 8:31 ` Alexander Gordeev
2012-06-21 21:53 ` Suresh Siddha
2012-06-20 0:18 ` [PATCH 1/2] x86, irq: update irq_cfg domain unless the new affinity is a subset of the current domain Suresh Siddha
2012-06-21 11:00 ` Alexander Gordeev
2012-06-21 21:58 ` Suresh Siddha
2012-05-22 10:12 ` [PATCH 2/3] x86: x2apic/cluster: Make use of lowest priority delivery mode Alexander Gordeev
2012-05-21 8:22 ` Ingo Molnar [this message]
2012-05-21 9:36 ` Alexander Gordeev
2012-05-21 12:40 ` Ingo Molnar
2012-05-21 14:48 ` Alexander Gordeev
2012-05-21 14:59 ` Ingo Molnar
2012-05-21 15:22 ` Alexander Gordeev
2012-05-21 15:34 ` Cyrill Gorcunov
2012-05-21 15:36 ` Linus Torvalds
2012-05-21 18:07 ` Suresh Siddha
2012-05-21 18:18 ` Linus Torvalds
2012-05-21 18:37 ` Suresh Siddha
2012-05-21 19:30 ` Ingo Molnar
2012-05-21 19:15 ` Ingo Molnar
2012-05-21 19:56 ` Suresh Siddha
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