Re: [PATCH 05/10] perf, x86: Move Intel specific code to intel_pmu_init()

[Robert Richter <robert.richter@amd.com>]

On 20.06.12 11:36:42, Peter Zijlstra wrote:
> On Tue, 2012-06-19 at 20:10 +0200, Robert Richter wrote:
> > There is some Intel specific code in the generic x86 path. Move it to
> > intel_pmu_init().
> > 
> > Signed-off-by: Robert Richter <robert.richter@amd.com>
> > ---
> 
> > diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
> > index 1eb9f00..90d7097 100644
> > --- a/arch/x86/kernel/cpu/perf_event_intel.c
> > +++ b/arch/x86/kernel/cpu/perf_event_intel.c
> > @@ -1760,7 +1760,7 @@ static __init void intel_nehalem_quirk(void)
> >  	}
> >  }
> >  
> > -__init int intel_pmu_init(void)
> > +static __init int __intel_pmu_init(void)
> >  {
> >  	union cpuid10_edx edx;
> >  	union cpuid10_eax eax;
> > @@ -1955,3 +1955,46 @@ __init int intel_pmu_init(void)
> >  
> >  	return 0;
> >  }
> > +
> > +__init int intel_pmu_init(void)
> > +{
> > +	struct event_constraint *c;
> > +	int ret = __intel_pmu_init();
> 
> 
> This seems like a nice enough cleanup all on its own, but why make it
> two functions?

Didn't know if checks are necessary after p6_pmu_init() and
p4_pmu_init(). I didn't want to touch the switch/case path containing
p6_pmu_init() and p4_pmu_init(). But it seems the p4 and p6 pmus don't
support fixed counters and have fix num_counter values. Thus we can
skip the checks that are moved from init_hw_perf_events() in that case
and leave intel_pmu_init() early.

-Robert

-- 
Advanced Micro Devices, Inc.
Operating System Research Center