From: Jean Delvare <khali@linux-fr.org>
To: Daniel Kurtz <djkurtz@chromium.org>
Cc: Ben Dooks <ben-linux@fluff.org>,
Wolfram Sang <w.sang@pengutronix.de>,
Seth Heasley <seth.heasley@intel.com>,
Olof Johansson <olof@lixom.net>,
Benson Leung <bleung@chromium.org>,
linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 7/8 v3] i2c: i801: enable irq for i801 smbus transactions
Date: Thu, 5 Jul 2012 12:29:53 +0200 [thread overview]
Message-ID: <20120705122953.3e458a30@endymion.delvare> (raw)
In-Reply-To: <20120705101015.1e3a3afc@endymion.delvare>
On Thu, 5 Jul 2012 10:10:15 +0200, Jean Delvare wrote:
> On Thu, 5 Jul 2012 12:31:11 +0800, Daniel Kurtz wrote:
> > On Thu, Jul 5, 2012 at 4:16 AM, Jean Delvare <khali@linux-fr.org> wrote:
> > > Implementing 1* has the drawback of limiting interrupt support to ICH5
> > > and later chips, but I suspect it is the easiest and safest way, so I
> > > have no objection if you want to do that.
> >
> > Let's do this first, and then refactor later to add support for
> > pre-ICH5 parts, if needed.
>
> OK, fine with me. The only downside is that it excludes my
> heavily-shared IRQ test machine, so testing that the shared IRQ case is
> properly covered will be a little harder.
Actually, no problem there: I can reproduce the issue just fine on my
ICH5 system, which shares an IRQ between the sound chip and the SMBus
controller. So I can use that system to test the updated code too.
--
Jean Delvare
next prev parent reply other threads:[~2012-07-05 10:30 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-06-27 13:54 [PATCH 0/8 v3] i2c: i801: enable irq Daniel Kurtz
2012-06-27 13:54 ` [PATCH 1/8 v3] i2c: i801: refactor use of LAST_BYTE i801_block_transaction_byte_by_byte Daniel Kurtz
2012-06-27 14:39 ` Jean Delvare
2012-06-27 13:54 ` [PATCH 2/8 v3] i2c: i801: optimize waiting for HWPEC to finish Daniel Kurtz
2012-06-27 14:58 ` Jean Delvare
2012-06-27 13:54 ` [PATCH 3/8 v3] i2c: i801: check INTR after every transaction Daniel Kurtz
2012-06-27 16:07 ` Jean Delvare
2012-06-28 7:51 ` Daniel Kurtz
2012-06-28 11:36 ` Jean Delvare
2012-07-01 21:20 ` Jean Delvare
2012-07-02 1:19 ` Daniel Kurtz
2012-07-02 10:08 ` Jean Delvare
2012-07-02 15:16 ` Jean Delvare
2012-06-27 13:54 ` [PATCH 4/8 v3] i2c: i801: check and return errors during byte-by-byte transfers Daniel Kurtz
2012-06-27 16:51 ` Jean Delvare
2012-06-28 3:46 ` Daniel Kurtz
2012-06-28 7:08 ` Jean Delvare
2012-06-27 13:54 ` [PATCH 5/8 v3] i2c: i801: rename some SMBHSTCNT bit constants Daniel Kurtz
2012-06-27 17:01 ` Jean Delvare
2012-06-27 13:54 ` [PATCH 6/8 v3] i2c: i801: drop ENABLE_INT9 Daniel Kurtz
2012-06-28 7:04 ` Jean Delvare
2012-06-27 13:54 ` [PATCH 7/8 v3] i2c: i801: enable irq for i801 smbus transactions Daniel Kurtz
2012-07-04 15:48 ` Jean Delvare
2012-07-04 20:16 ` Jean Delvare
2012-07-05 4:31 ` Daniel Kurtz
2012-07-05 8:10 ` Jean Delvare
2012-07-05 10:29 ` Jean Delvare [this message]
2012-07-06 10:28 ` Daniel Kurtz
2012-07-06 11:55 ` Jean Delvare
2012-06-27 13:54 ` [PATCH 8/8 v3] i2c: i801: enable irq for byte_by_byte transactions Daniel Kurtz
2012-07-05 14:46 ` Jean Delvare
2012-07-08 11:53 ` Jean Delvare
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